[PATCH 5/5] drm/amd/pm: change pp_dpm_sclk/mclk/fclk attribute is RO for aldebaran

[Lazar, Lijo]

Reviewed-by: Lijo Lazar <lijo.lazar at amd.com>

On 8/11/2021 2:03 PM, Kevin Wang wrote:
> the following clock is only support voltage DPM, change attribute to RO:
> 1. pp_dpm_sclk
> 2. pp_dpm_mclk
> 3. pp_dpm_fclk
> 
> Signed-off-by: Kevin Wang <kevin1.wang at amd.com>
> ---
>   drivers/gpu/drm/amd/pm/amdgpu_pm.c | 9 +++++++--
>   1 file changed, 7 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> index 769f58d5ae1a..f894b34418df 100644
> --- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> +++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> @@ -2094,14 +2094,19 @@ static int default_attr_update(struct amdgpu_device *adev, struct amdgpu_device_
>   			*states = ATTR_STATE_UNSUPPORTED;
>   	}
>   
> -	if (asic_type == CHIP_ARCTURUS) {
> -		/* Arcturus does not support standalone mclk/socclk/fclk level setting */
> +	switch (asic_type) {
> +	case CHIP_ARCTURUS:
> +	case CHIP_ALDEBARAN:
> +		/* the Mi series card does not support standalone mclk/socclk/fclk level setting */
>   		if (DEVICE_ATTR_IS(pp_dpm_mclk) ||
>   		    DEVICE_ATTR_IS(pp_dpm_socclk) ||
>   		    DEVICE_ATTR_IS(pp_dpm_fclk)) {
>   			dev_attr->attr.mode &= ~S_IWUGO;
>   			dev_attr->store = NULL;
>   		}
> +		break;
> +	default:
> +		break;
>   	}
>   
>   	if (DEVICE_ATTR_IS(pp_dpm_dcefclk)) {
>