[PATCH 3/5] drm/amdgpu/vce:set vce ring priority level
Satyajit Sahu
satyajit.sahu at amd.com
Tue Aug 24 05:55:08 UTC 2021
There are multiple rings available in VCE. Map each ring
to different priority.
Signed-off-by: Satyajit Sahu <satyajit.sahu at amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 14 ++++++++++++++
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h | 15 +++++++++++++++
2 files changed, 29 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
index 1ae7f824adc7..379f27f14b39 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
@@ -1168,3 +1168,17 @@ int amdgpu_vce_ring_test_ib(struct amdgpu_ring *ring, long timeout)
amdgpu_bo_free_kernel(&bo, NULL, NULL);
return r;
}
+
+enum vce_enc_ring_priority get_vce_ring_prio(int index)
+{
+ switch(index) {
+ case AMDGPU_VCE_GENERAL_PURPOSE:
+ return AMDGPU_VCE_ENC_PRIO_NORMAL;
+ case AMDGPU_VCE_LOW_LATENCY:
+ return AMDGPU_VCE_ENC_PRIO_HIGH;
+ case AMDGPU_VCE_REALTIME:
+ return AMDGPU_VCE_ENC_PRIO_VERY_HIGH;
+ default:
+ return AMDGPU_VCE_ENC_PRIO_NORMAL;
+ }
+}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h
index d6d83a3ec803..3cb34ee3e4b6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.h
@@ -32,6 +32,19 @@
#define AMDGPU_VCE_FW_53_45 ((53 << 24) | (45 << 16))
+enum vce_enc_ring_priority {
+ AMDGPU_VCE_ENC_PRIO_NORMAL = 1,
+ AMDGPU_VCE_ENC_PRIO_HIGH,
+ AMDGPU_VCE_ENC_PRIO_VERY_HIGH,
+ AMDGPU_VCE_ENC_PRIO_MAX
+};
+
+enum vce_enc_ring_type {
+ AMDGPU_VCE_GENERAL_PURPOSE,
+ AMDGPU_VCE_LOW_LATENCY,
+ AMDGPU_VCE_REALTIME
+};
+
struct amdgpu_vce {
struct amdgpu_bo *vcpu_bo;
uint64_t gpu_addr;
@@ -72,4 +85,6 @@ void amdgpu_vce_ring_end_use(struct amdgpu_ring *ring);
unsigned amdgpu_vce_ring_get_emit_ib_size(struct amdgpu_ring *ring);
unsigned amdgpu_vce_ring_get_dma_frame_size(struct amdgpu_ring *ring);
+enum vce_enc_ring_priority get_vce_ring_prio(int index);
+
#endif
--
2.25.1
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