[PATCH 1/5] drm/sched:add new priority level
Sharma, Shashank
shashank.sharma at amd.com
Tue Aug 24 08:32:47 UTC 2021
Hi Christian,
I am a bit curious here.
I thought it would be a good idea to add a new SW priority level, so
that any other driver can also utilize this SW infrastructure.
So it could be like, if you have a HW which matches with SW priority
levels, directly map your HW queue to the SW priority level, like:
DRM_SCHED_PRIORITY_VERY_HIGH: mapped to a queue in HW reserved for real
time or very high priority tasks, which can't be missed
DRM_SCHED_PRIORITY_HIGH : mapped to a queue of High priority tasks, for
better experience, like encode/decode operations.
DRM_SCHED_PRIORITY_NORMAL: default, mapped to a queue of tasks without a
priority context specified
DRM_SCHED_PRIORITY_MIN: queue for specifically mentioned low priority tasks
Depending on the HW we are running on, we can map these SW queues to
corresponding HW queues, isn't it ?
Regards
Shashank
On 8/24/2021 11:40 AM, Christian König wrote:
> I haven't followed the previous discussion, but that looks like this
> change is based on a misunderstanding.
>
> Those here are the software priorities used in the scheduler, but what
> you are working on are the hardware priorities.
>
> That are two completely different things which we shouldn't mix up.
>
> Regards,
> Christian.
>
> Am 24.08.21 um 07:55 schrieb Satyajit Sahu:
>> Adding a new priority level DRM_SCHED_PRIORITY_VERY_HIGH
>>
>> Signed-off-by: Satyajit Sahu <satyajit.sahu at amd.com>
>> ---
>> include/drm/gpu_scheduler.h | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/include/drm/gpu_scheduler.h b/include/drm/gpu_scheduler.h
>> index d18af49fd009..d0e5e234da5f 100644
>> --- a/include/drm/gpu_scheduler.h
>> +++ b/include/drm/gpu_scheduler.h
>> @@ -40,6 +40,7 @@ enum drm_sched_priority {
>> DRM_SCHED_PRIORITY_MIN,
>> DRM_SCHED_PRIORITY_NORMAL,
>> DRM_SCHED_PRIORITY_HIGH,
>> + DRM_SCHED_PRIORITY_VERY_HIGH,
>> DRM_SCHED_PRIORITY_KERNEL,
>> DRM_SCHED_PRIORITY_COUNT,
>
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