[PATCH V2 1/1] drm/amdgpu: Disable PCIE_DPM on Intel RKL Platform

[Alex Deucher]

On Thu, Aug 26, 2021 at 9:43 AM Koba Ko <koba.ko at canonical.com> wrote:
>
> On Thu, Aug 26, 2021, 9:22 PM Alex Deucher <alexdeucher at gmail.com> wrote:
> >
> > On Wed, Aug 25, 2021 at 9:55 PM Koba Ko <koba.ko at canonical.com> wrote:
> > >
> > > AMD polaris GPUs have an issue about audio noise on RKL platform,
> > > they provide a commit to fix but for SMU7-based GPU still
> > > need another module parameter,
> >
> > For future readers, it might be better to provide a bit more detail in
> > the patch description.  Something like:
> >
> > "Due to high latency in PCIE gen switching on RKL platforms, disable
> > PCIE gen switching on polaris
> > GPUs to avoid HDMI/DP audio issues."
> >
> > Alex
>
> hi Alex,
> because I'm not the issue owner and don't know the details, could you
> please provide a full description?
> I would like to add in the comment.

How about this:

Due to high latency in PCIE clock switching on RKL platforms,
switching the PCIE clock dynamically at runtime can lead to HDMI/DP
audio problems.  On newer asics this is handled in the SMU firmware.
For SMU7-based asics, disable PCIE clock switching to avoid the issue.

Alex

>
> >
> > >
> > > modprobe amdgpu ppfeaturemask=0xfff7bffb
> > >
> > > to avoid the module parameter, switch PCI_DPM by determining
> > > intel platform in amd drm driver is a better way.
> > >
> > > Fixes: 1a31474cdb48 ("drm/amd/pm: workaround for audio noise issue")
> > > Ref: https://lists.freedesktop.org/archives/amd-gfx/2021-August/067413.html
> > > Signed-off-by: Koba Ko <koba.ko at canonical.com>
> > > ---
> > >  .../gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c   | 15 ++++++++++++++-
> > >  1 file changed, 14 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
> > > index 0541bfc81c1b..6ce2a2046457 100644
> > > --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
> > > +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
> > > @@ -27,6 +27,7 @@
> > >  #include <linux/pci.h>
> > >  #include <linux/slab.h>
> > >  #include <asm/div64.h>
> > > +#include <asm/intel-family.h>
> > >  #include <drm/amdgpu_drm.h>
> > >  #include "ppatomctrl.h"
> > >  #include "atombios.h"
> > > @@ -1733,6 +1734,17 @@ static int smu7_disable_dpm_tasks(struct pp_hwmgr *hwmgr)
> > >         return result;
> > >  }
> > >
> > > +static bool intel_core_rkl_chk(void)
> > > +{
> > > +#ifdef CONFIG_X86_64
> > > +       struct cpuinfo_x86 *c = &cpu_data(0);
> > > +
> > > +       return (c->x86 == 6 && c->x86_model == INTEL_FAM6_ROCKETLAKE);
> > > +#else
> > > +       return false;
> > > +#endif
> > > +}
> > > +
> > >  static void smu7_init_dpm_defaults(struct pp_hwmgr *hwmgr)
> > >  {
> > >         struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
> > > @@ -1758,7 +1770,8 @@ static void smu7_init_dpm_defaults(struct pp_hwmgr *hwmgr)
> > >
> > >         data->mclk_dpm_key_disabled = hwmgr->feature_mask & PP_MCLK_DPM_MASK ? false : true;
> > >         data->sclk_dpm_key_disabled = hwmgr->feature_mask & PP_SCLK_DPM_MASK ? false : true;
> > > -       data->pcie_dpm_key_disabled = hwmgr->feature_mask & PP_PCIE_DPM_MASK ? false : true;
> > > +       data->pcie_dpm_key_disabled =
> > > +               intel_core_rkl_chk() || !(hwmgr->feature_mask & PP_PCIE_DPM_MASK);
> > >         /* need to set voltage control types before EVV patching */
> > >         data->voltage_control = SMU7_VOLTAGE_CONTROL_NONE;
> > >         data->vddci_control = SMU7_VOLTAGE_CONTROL_NONE;
> > > --
> > > 2.25.1
> > >