[PATCH] drm/amdgpu: correct register access for RLC_JUMP_TABLE_RESTORE

[Alex Deucher]

On Mon, Dec 6, 2021 at 5:23 AM Le Ma <Le.Ma at amd.com> wrote:
>
> From: Le Ma <le.ma at amd.com>
>
> should count on GC IP base address
>
> Signed-off-by: Le Ma <le.ma at amd.com>
> Signed-off-by: Hawking Zhang <Hawking.Zhang at amd.com>
> Reviewed-by: Hawking Zhang <Hawking.Zhang at amd.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index b305fd39874f..edb3e3b08eed 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -3070,8 +3070,8 @@ static void gfx_v9_0_init_pg(struct amdgpu_device *adev)
>                               AMD_PG_SUPPORT_CP |
>                               AMD_PG_SUPPORT_GDS |
>                               AMD_PG_SUPPORT_RLC_SMU_HS)) {
> -               WREG32(mmRLC_JUMP_TABLE_RESTORE,
> -                      adev->gfx.rlc.cp_table_gpu_addr >> 8);
> +               WREG32_SOC15(GC, 0, mmRLC_JUMP_TABLE_RESTORE,
> +                            adev->gfx.rlc.cp_table_gpu_addr >> 8);
>                 gfx_v9_0_init_gfx_power_gating(adev);
>         }
>  }
> --
> 2.17.1
>