[PATCH] drm/amd/display: Guard debug option for dp_force_sst_set
Aurabindo Pillai
aurabindo.pillai at amd.com
Mon Dec 13 14:51:10 UTC 2021
[Why&How]
Debug option for forcing SST mode when using MST capable receivers is
guarded under the config option CONFIG_DRM_AMD_DC_DCN. Hence the corresponding
code exposing it in debugfs must be guarded as well, to prevent compile errors
for non DCN builds.
Fixes: ad9601f00 (drm/amd/display: Add Debugfs Entry to Force in SST Sequence)
Signed-off-by: Aurabindo Pillai <aurabindo.pillai at amd.com>
Reported-by: kernel test robot <lkp at intel.com>
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
index 1779c7daaf72..fae3c74a2885 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
@@ -3237,6 +3237,7 @@ static int disable_hpd_get(void *data, u64 *val)
DEFINE_DEBUGFS_ATTRIBUTE(disable_hpd_ops, disable_hpd_get,
disable_hpd_set, "%llu\n");
+#ifdef CONFIG_DRM_AMD_DC_DCN
/*
* Force sst sequence in mst capable receiver.
* Example usage: echo 1 > /sys/kernel/debug/dri/0/amdgpu_dm_dp_set_mst_en_for_sst
@@ -3260,6 +3261,7 @@ static int dp_force_sst_get(void *data, u64 *val)
}
DEFINE_DEBUGFS_ATTRIBUTE(dp_set_mst_en_for_sst_ops, dp_force_sst_get,
dp_force_sst_set, "%llu\n");
+#endif
/*
* Sets the DC visual confirm debug option from the given string.
@@ -3370,9 +3372,10 @@ void dtn_debugfs_init(struct amdgpu_device *adev)
adev, &mst_topo_fops);
debugfs_create_file("amdgpu_dm_dtn_log", 0644, root, adev,
&dtn_log_fops);
+#ifdef CONFIG_DRM_AMD_DC_DCN
debugfs_create_file("amdgpu_dm_dp_set_mst_en_for_sst", 0644, root, adev,
&dp_set_mst_en_for_sst_ops);
-
+#endif
debugfs_create_file_unsafe("amdgpu_dm_visual_confirm", 0644, root, adev,
&visual_confirm_fops);
--
2.30.2
More information about the amd-gfx
mailing list