[PATCH 4/5] drm/amdgpu: Initialize Aldebaran RLC function pointers

[Nieto, David M]

[AMD Official Use Only]

         case IP_VERSION(9, 4, 1):
         case IP_VERSION(9, 4, 2):
                 amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block);
+               if (amdgpu_sriov_vf(adev) && adev->ip_versions[GC_HWIP][0] == IP_VERSION(9, 4, 2))
+                       gfx_v9_0_set_rlc_funcs(adev);
                 break;
         case IP_VERSION(10, 1, 10):

I think for the above, it would be more clear just to separate them:

case IP_VERSION(9, 4, 1):
    amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block);
    break;
case IP_VERSION(9, 4, 2):
   amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block);
   if (amdgpu_sriov_vf(adev))
       gfx_v9_0_set_rlc_funcs(adev);
   break;
________________________________
From: Skvortsov, Victor <Victor.Skvortsov at amd.com>
Sent: Wednesday, December 15, 2021 10:55 AM
To: amd-gfx at lists.freedesktop.org <amd-gfx at lists.freedesktop.org>; Deng, Emily <Emily.Deng at amd.com>; Liu, Monk <Monk.Liu at amd.com>; Ming, Davis <Davis.Ming at amd.com>; Liu, Shaoyun <Shaoyun.Liu at amd.com>; Zhou, Peng Ju <PengJu.Zhou at amd.com>; Chen, JingWen <JingWen.Chen2 at amd.com>; Chen, Horace <Horace.Chen at amd.com>; Nieto, David M <David.Nieto at amd.com>
Cc: Skvortsov, Victor <Victor.Skvortsov at amd.com>
Subject: [PATCH 4/5] drm/amdgpu: Initialize Aldebaran RLC function pointers

In SRIOV, RLC function pointers must be initialized early as
we rely on the RLCG interface for all GC register access.

Signed-off-by: Victor Skvortsov <victor.skvortsov at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 2 ++
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c         | 3 +--
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.h         | 2 ++
 3 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
index 65e1f6cc59dd..1bc92a38d124 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
@@ -844,6 +844,8 @@ static int amdgpu_discovery_set_gc_ip_blocks(struct amdgpu_device *adev)
         case IP_VERSION(9, 4, 1):
         case IP_VERSION(9, 4, 2):
                 amdgpu_device_ip_block_add(adev, &gfx_v9_0_ip_block);
+               if (amdgpu_sriov_vf(adev) && adev->ip_versions[GC_HWIP][0] == IP_VERSION(9, 4, 2))
+                       gfx_v9_0_set_rlc_funcs(adev);
                 break;
         case IP_VERSION(10, 1, 10):
         case IP_VERSION(10, 1, 2):
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index edb3e3b08eed..d252b06efa43 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -816,7 +816,6 @@ static void gfx_v9_0_sriov_wreg(struct amdgpu_device *adev, u32 offset,
 static void gfx_v9_0_set_ring_funcs(struct amdgpu_device *adev);
 static void gfx_v9_0_set_irq_funcs(struct amdgpu_device *adev);
 static void gfx_v9_0_set_gds_init(struct amdgpu_device *adev);
-static void gfx_v9_0_set_rlc_funcs(struct amdgpu_device *adev);
 static int gfx_v9_0_get_cu_info(struct amdgpu_device *adev,
                                 struct amdgpu_cu_info *cu_info);
 static uint64_t gfx_v9_0_get_gpu_clock_counter(struct amdgpu_device *adev);
@@ -7066,7 +7065,7 @@ static void gfx_v9_0_set_irq_funcs(struct amdgpu_device *adev)
         adev->gfx.cp_ecc_error_irq.funcs = &gfx_v9_0_cp_ecc_error_irq_funcs;
 }

-static void gfx_v9_0_set_rlc_funcs(struct amdgpu_device *adev)
+void gfx_v9_0_set_rlc_funcs(struct amdgpu_device *adev)
 {
         switch (adev->ip_versions[GC_HWIP][0]) {
         case IP_VERSION(9, 0, 1):
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.h b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.h
index dfe8d4841f58..1817e252354f 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.h
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.h
@@ -29,4 +29,6 @@ extern const struct amdgpu_ip_block_version gfx_v9_0_ip_block;
 void gfx_v9_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num,
                            u32 instance);

+void gfx_v9_0_set_rlc_funcs(struct amdgpu_device *adev);
+
 #endif
--
2.25.1

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