[PATCH] drm/amdgpu: Send Message to SMU on aldebaran passthrough for sbr handling

Quan, Evan Evan.Quan at amd.com
Mon Dec 20 02:09:30 UTC 2021


[AMD Official Use Only]



> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of
> sashank saye
> Sent: Saturday, December 18, 2021 2:56 AM
> To: amd-gfx at lists.freedesktop.org
> Cc: Saye, Sashank <Sashank.Saye at amd.com>
> Subject: [PATCH] drm/amdgpu: Send Message to SMU on aldebaran
> passthrough for sbr handling
> 
> For Aldebaran chip passthrough case we need to intimate SMU
> about special handling for SBR.On older chips we send
> LightSBR to SMU, enabling the same for Aldebaran. Slight
> difference, compared to previous chips, is on Aldebaran, SMU
> would do a heavy reset on SBR. Hence, the word Heavy
> instead of Light SBR is used for SMU to differentiate.
> 
> Signed-off-by: sashank saye <sashank.saye at amd.com>
> Change-Id: I79420e7352bb670d6f9696df97d7546f131b18fc
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c         |  9 ++++-----
>  drivers/gpu/drm/amd/pm/inc/aldebaran_ppsmc.h       |  4 +++-
>  drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h            |  6 +++---
>  drivers/gpu/drm/amd/pm/inc/smu_types.h             |  3 ++-
>  drivers/gpu/drm/amd/pm/inc/smu_v11_0.h             |  2 +-
>  drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c          |  6 +++---
>  drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c  |  2 +-
>  drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c     |  2 +-
>  drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c | 10
> ++++++++++
>  9 files changed, 28 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index f31caec669e7..e4c93d373224 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -2618,11 +2618,10 @@ static int amdgpu_device_ip_late_init(struct
> amdgpu_device *adev)
>  	if (r)
>  		DRM_ERROR("enable mgpu fan boost failed (%d).\n", r);
> 
> -	/* For XGMI + passthrough configuration on arcturus, enable light
> SBR */
> -	if (adev->asic_type == CHIP_ARCTURUS &&
> -	    amdgpu_passthrough(adev) &&
> -	    adev->gmc.xgmi.num_physical_nodes > 1)
> -		smu_set_light_sbr(&adev->smu, true);
> +	/* For passthrough configuration on arcturus and aldebaran, enable
> special handling SBR */
> +	if (amdgpu_passthrough(adev) && ((adev->asic_type ==
> CHIP_ARCTURUS && adev->gmc.xgmi.num_physical_nodes > 1)||
> +			       adev->asic_type == CHIP_ALDEBARAN ))
> +		smu_handle_passthrough_sbr(&adev->smu, true);
> 
>  	if (adev->gmc.xgmi.num_physical_nodes > 1) {
>  		mutex_lock(&mgpu_info.mutex);
> diff --git a/drivers/gpu/drm/amd/pm/inc/aldebaran_ppsmc.h
> b/drivers/gpu/drm/amd/pm/inc/aldebaran_ppsmc.h
> index 35fa0d8e92dd..ab66a4b9e438 100644
> --- a/drivers/gpu/drm/amd/pm/inc/aldebaran_ppsmc.h
> +++ b/drivers/gpu/drm/amd/pm/inc/aldebaran_ppsmc.h
> @@ -102,7 +102,9 @@
> 
>  #define PPSMC_MSG_GfxDriverResetRecovery	0x42
>  #define PPSMC_MSG_BoardPowerCalibration 	0x43
> -#define PPSMC_Message_Count			0x44
> +#define PPSMC_MSG_HeavySBR                      0x45
> +#define PPSMC_Message_Count			0x46
> +
> 
>  //PPSMC Reset Types
>  #define PPSMC_RESET_TYPE_WARM_RESET              0x00
> diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
> b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
> index 2b9b9a7ba97a..ba7565bc8104 100644
> --- a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
> +++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
> @@ -1257,9 +1257,9 @@ struct pptable_funcs {
>  	int (*set_fine_grain_gfx_freq_parameters)(struct smu_context
> *smu);
> 
>  	/**
> -	 * @set_light_sbr:  Set light sbr mode for the SMU.
> +	 * @smu_handle_passthrough_sbr:  Send message to SMU about
> special handling for SBR.
>  	 */
> -	int (*set_light_sbr)(struct smu_context *smu, bool enable);
> +	int (*smu_handle_passthrough_sbr)(struct smu_context *smu, bool
> enable);
> 
>  	/**
>  	 * @wait_for_event:  Wait for events from SMU.
> @@ -1415,7 +1415,7 @@ int smu_allow_xgmi_power_down(struct
> smu_context *smu, bool en);
> 
>  int smu_get_status_gfxoff(struct amdgpu_device *adev, uint32_t *value);
> 
> -int smu_set_light_sbr(struct smu_context *smu, bool enable);
> +int smu_handle_passthrough_sbr(struct smu_context *smu, bool enable);
> 
>  int smu_wait_for_event(struct amdgpu_device *adev, enum
> smu_event_type event,
>  		       uint64_t event_arg);
> diff --git a/drivers/gpu/drm/amd/pm/inc/smu_types.h
> b/drivers/gpu/drm/amd/pm/inc/smu_types.h
> index 18b862a90fbe..ff8a0bcbd290 100644
> --- a/drivers/gpu/drm/amd/pm/inc/smu_types.h
> +++ b/drivers/gpu/drm/amd/pm/inc/smu_types.h
> @@ -229,7 +229,8 @@
>  	__SMU_DUMMY_MAP(BoardPowerCalibration),   \
>  	__SMU_DUMMY_MAP(RequestGfxclk),           \
>  	__SMU_DUMMY_MAP(ForceGfxVid),             \
> -	__SMU_DUMMY_MAP(UnforceGfxVid),
> +	__SMU_DUMMY_MAP(UnforceGfxVid),           \
> +	__SMU_DUMMY_MAP(HeavySBR),
> 
>  #undef __SMU_DUMMY_MAP
>  #define __SMU_DUMMY_MAP(type)	SMU_MSG_##type
> diff --git a/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h
> b/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h
> index 2d422e6a9feb..acb3be292096 100644
> --- a/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h
> +++ b/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h
> @@ -312,7 +312,7 @@ int smu_v11_0_deep_sleep_control(struct
> smu_context *smu,
> 
>  void smu_v11_0_interrupt_work(struct smu_context *smu);
> 
> -int smu_v11_0_set_light_sbr(struct smu_context *smu, bool enable);
> +int smu_v11_0_handle_passthrough_sbr(struct smu_context *smu, bool
> enable);
> 
>  int smu_v11_0_restore_user_od_settings(struct smu_context *smu);
> 
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> index af98fa140d83..76f95e8ada4c 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> @@ -3058,13 +3058,13 @@ static int smu_gfx_state_change_set(void
> *handle,
>  	return ret;
>  }
> 
> -int smu_set_light_sbr(struct smu_context *smu, bool enable)
> +int smu_handle_passthrough_sbr(struct smu_context *smu, bool enable)
>  {
>  	int ret = 0;
> 
>  	mutex_lock(&smu->mutex);
> -	if (smu->ppt_funcs->set_light_sbr)
> -		ret = smu->ppt_funcs->set_light_sbr(smu, enable);
> +	if (smu->ppt_funcs->smu_handle_passthrough_sbr)
> +		ret = smu->ppt_funcs->smu_handle_passthrough_sbr(smu,
> enable);
>  	mutex_unlock(&smu->mutex);
> 
>  	return ret;
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> index 58bc387fb279..505d2fb94fd9 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> @@ -2472,7 +2472,7 @@ static const struct pptable_funcs
> arcturus_ppt_funcs = {
>  	.deep_sleep_control = smu_v11_0_deep_sleep_control,
>  	.get_fan_parameters = arcturus_get_fan_parameters,
>  	.interrupt_work = smu_v11_0_interrupt_work,
> -	.set_light_sbr = smu_v11_0_set_light_sbr,
> +	.smu_handle_passthrough_sbr =
> smu_v11_0_handle_passthrough_sbr,
>  	.set_mp1_state = smu_cmn_set_mp1_state,
>  };
> 
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
> b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
> index 28b7c0562b99..4e9e2cf39859 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
> @@ -1724,7 +1724,7 @@ int smu_v11_0_mode1_reset(struct smu_context
> *smu)
>  	return ret;
>  }
> 
> -int smu_v11_0_set_light_sbr(struct smu_context *smu, bool enable)
> +int smu_v11_0_handle_passthrough_sbr(struct smu_context *smu, bool
> enable)
>  {
>  	int ret = 0;
> 
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
> b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
> index 7433a051e795..0e60d63ba94f 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
> @@ -141,6 +141,7 @@ static const struct cmn2asic_msg_mapping
> aldebaran_message_map[SMU_MSG_MAX_COUNT
>  	MSG_MAP(SetUclkDpmMode,
> PPSMC_MSG_SetUclkDpmMode,			0),
>  	MSG_MAP(GfxDriverResetRecovery,
> PPSMC_MSG_GfxDriverResetRecovery,		0),
>  	MSG_MAP(BoardPowerCalibration,
> PPSMC_MSG_BoardPowerCalibration,		0),
> +	MSG_MAP(HeavySBR,                            PPSMC_MSG_HeavySBR,
> 0),
>  };
> 
>  static const struct cmn2asic_mapping aldebaran_clk_map[SMU_CLK_COUNT]
> = {
> @@ -1912,6 +1913,14 @@ static int aldebaran_mode2_reset(struct
> smu_context *smu)
>  	return ret;
>  }
> 
> +static int aldebaran_smu_handle_passthrough_sbr(struct smu_context
> *smu, bool enable)
> +{
> +	int ret = 0;
> +	ret =  smu_cmn_send_smc_msg_with_param(smu,
> SMU_MSG_HeavySBR, enable ? 1 : 0, NULL);
[Quan, Evan] It seems the " PPSMC_MSG_HeavySBR" message is only visible on latest pmfw.
To make it compatible with old pmfws, can you add some version check(like below) before issuing that message?

If  (smu_version >= 0x00442F00) /* 68.47 ? */
        ret =  smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_HeavySBR, enable ? 1 : 0, NULL);

P.S. I just saw this change already landed on drm-next. So, maybe you can make a new patch for that.

BR
Evan
> +
> +	return ret;
> +}
> +
>  static bool aldebaran_is_mode1_reset_supported(struct smu_context *smu)
>  {
>  #if 0
> @@ -2021,6 +2030,7 @@ static const struct pptable_funcs
> aldebaran_ppt_funcs = {
>  	.get_gpu_metrics = aldebaran_get_gpu_metrics,
>  	.mode1_reset_is_support = aldebaran_is_mode1_reset_supported,
>  	.mode2_reset_is_support = aldebaran_is_mode2_reset_supported,
> +	.smu_handle_passthrough_sbr =
> aldebaran_smu_handle_passthrough_sbr,
>  	.mode1_reset = aldebaran_mode1_reset,
>  	.set_mp1_state = aldebaran_set_mp1_state,
>  	.mode2_reset = aldebaran_mode2_reset,
> --
> 2.25.1


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