[PATCH 3/3] drm/amdgpu: enable gfx wave limiting for high priority compute jobs

Christian König ckoenig.leichtzumerken at gmail.com
Mon Feb 1 13:59:19 UTC 2021


Am 01.02.21 um 14:56 schrieb Nirmoy:
>
> On 2/1/21 1:19 PM, Christian König wrote:
>> Am 01.02.21 um 13:07 schrieb Nirmoy Das:
>>> Enable gfx wave limiting for gfx jobs before pushing high priority
>>> compute jobs so that high priority compute jobs gets more resources
>>> to finish early.
>>>
>>> Signed-off-by: Nirmoy Das <nirmoy.das at amd.com>
>>> ---
>>>   drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 9 +++++++++
>>>   1 file changed, 9 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c 
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
>>> index 024d0a563a65..ee48989dfb4c 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
>>> @@ -195,6 +195,10 @@ int amdgpu_ib_schedule(struct amdgpu_ring 
>>> *ring, unsigned num_ibs,
>>>       if ((ib->flags & AMDGPU_IB_FLAG_EMIT_MEM_SYNC) && 
>>> ring->funcs->emit_mem_sync)
>>>           ring->funcs->emit_mem_sync(ring);
>>>   +    if (ring->funcs->emit_wave_limit && job &&
>>> +        job->base.s_priority >= DRM_SCHED_PRIORITY_HIGH)
>>> +        ring->funcs->emit_wave_limit(ring, true);
>>
>> Since we can only do this for one ring anyway we should probably 
>> check the ring priority instead of the job priority.
>
>
>
>>
>> Alternatively you could put this into begin_use and end_use callbacks 
>> of the ring instead of adding an extra callback for this.
>
>
> I didn't know about begin_use callbacks. I will resend with above 
> suggested changes.

Wait a second. I've just double checked since begin/end use was added 
for power management handling.

So your case won't work here without further code change.

Better to stick with your current approach and just check the ring 
instead of the job.

Christian.

>
>
> Thanks,
>
> Nirmoy
>
>
>>
>> Christian.
>>
>>> +
>>>       if (ring->funcs->insert_start)
>>>           ring->funcs->insert_start(ring);
>>>   @@ -295,6 +299,11 @@ int amdgpu_ib_schedule(struct amdgpu_ring 
>>> *ring, unsigned num_ibs,
>>>       ring->current_ctx = fence_ctx;
>>>       if (vm && ring->funcs->emit_switch_buffer)
>>>           amdgpu_ring_emit_switch_buffer(ring);
>>> +
>>> +    if (ring->funcs->emit_wave_limit && job &&
>>> +        job->base.s_priority >= DRM_SCHED_PRIORITY_HIGH)
>>> +        ring->funcs->emit_wave_limit(ring, false);
>>> +
>>>       amdgpu_ring_commit(ring);
>>>       return 0;
>>>   }
>>
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