[PATCH 050/159] drm/amdgpu: set CPU mapping of vram as cached for A+A mode (v2)

Alex Deucher alexander.deucher at amd.com
Wed Feb 24 22:17:10 UTC 2021


From: Eric Huang <jinhuieric.huang at amd.com>

v1: new A+A HW supports cached vram mapped to cpu (Eric)
v2: switch to range manager init functions for xgmi
connected host case (Hawking)

Signed-off-by: Eric Huang <jinhuieric.huang at amd.com>
Reviewed-by: Oak Zeng <Oak.Zeng at amd.com>
Singed-off-by: Hawking Zhang <Hawking.Zhang at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c |  7 +++++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c    | 13 ++++++++++++-
 2 files changed, 17 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 0bd22ed1dacf..c02e28c0683d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -136,8 +136,11 @@ void amdgpu_bo_placement_from_domain(struct amdgpu_bo *abo, u32 domain)
 
 		places[c].fpfn = 0;
 		places[c].lpfn = 0;
-		places[c].flags = TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED |
-			TTM_PL_FLAG_VRAM;
+		places[c].flags = TTM_PL_FLAG_VRAM;
+		if (adev->gmc.xgmi.connected_to_cpu)
+			places[c].flags |= TTM_PL_FLAG_CACHED;
+		else
+			places[c].flags |= TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED;
 
 		if (flags & AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED)
 			places[c].lpfn = visible_pfn;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 7b2db779f313..441799f0da05 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -66,8 +66,19 @@ static int amdgpu_ttm_init_on_chip(struct amdgpu_device *adev,
 				    unsigned int type,
 				    uint64_t size_in_page)
 {
+	uint32_t available_caching;
+	uint32_t default_caching;
+
+	if (adev->gmc.xgmi.connected_to_cpu) {
+		available_caching = TTM_PL_FLAG_CACHED;
+		default_caching = TTM_PL_FLAG_CACHED;
+	} else {
+		available_caching = TTM_PL_FLAG_UNCACHED;
+		default_caching = TTM_PL_FLAG_UNCACHED;
+	}
+
 	return ttm_range_man_init(&adev->mman.bdev, type,
-				  TTM_PL_FLAG_UNCACHED, TTM_PL_FLAG_UNCACHED,
+				  available_caching, default_caching,
 				  false, size_in_page);
 }
 
-- 
2.29.2



More information about the amd-gfx mailing list