[PATCH 117/159] drm/amdgpu: Don't change CPU mapping of on-chip memory pools

[Alex Deucher]

From: Harish Kasiviswanathan <Harish.Kasiviswanathan at amd.com>

This change does a partial revert of this commit

'drm/amdgpu: set CPU mapping of vram as cached for A+A mode (v2)'

The on-chip memory pools are not accessed by CPU so the previous change
is not necessary

Acked-by: Joseph Greathouse <Joseph.Greathouse at amd.com>
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan at amd.com>
Reviewed-by: Oak Zeng <Oak.Zeng at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 13 +------------
 1 file changed, 1 insertion(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 3a2a922c6c1b..1118142f783a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -66,19 +66,8 @@ static int amdgpu_ttm_init_on_chip(struct amdgpu_device *adev,
 				    unsigned int type,
 				    uint64_t size_in_page)
 {
-	uint32_t available_caching;
-	uint32_t default_caching;
-
-	if (adev->gmc.xgmi.connected_to_cpu) {
-		available_caching = TTM_PL_FLAG_CACHED;
-		default_caching = TTM_PL_FLAG_CACHED;
-	} else {
-		available_caching = TTM_PL_FLAG_UNCACHED;
-		default_caching = TTM_PL_FLAG_UNCACHED;
-	}
-
 	return ttm_range_man_init(&adev->mman.bdev, type,
-				  available_caching, default_caching,
+				  TTM_PL_FLAG_UNCACHED, TTM_PL_FLAG_UNCACHED,
 				  false, size_in_page);
 }
 
-- 
2.29.2