[PATCH 088/159] drm/ttm: ioremap buffer properly according to TTM placement flag
Christian König
christian.koenig at amd.com
Thu Feb 25 13:41:58 UTC 2021
The whole patch set needs a rebase since the TTM_PL_FLAG_* for
controlling the caching doesn't exists any more upstream.
How should we approach that?
Thanks,
Christian.
Am 24.02.21 um 23:17 schrieb Alex Deucher:
> From: Oak Zeng <Oak.Zeng at amd.com>
>
> If TTM placement flag is cached, buffer is intended to be mapped
> as cached from CPU. Map it with ioremap_cache.
>
> This wasn't necessary before as device memory was never mapped
> as cached from CPU side. It becomes necessary for aldebaran as
> device memory is mapped cached from CPU.
>
> Signed-off-by: Oak Zeng <Oak.Zeng at amd.com>
> Reviewed-by: Christian Koenig <Christian.Koenig at amd.com>
> Tested-by: Amber Lin <Amber.Lin at amd.com>
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
> ---
> drivers/gpu/drm/ttm/ttm_bo_util.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/ttm/ttm_bo_util.c b/drivers/gpu/drm/ttm/ttm_bo_util.c
> index ee04716b2603..e11ec1ff5d0b 100644
> --- a/drivers/gpu/drm/ttm/ttm_bo_util.c
> +++ b/drivers/gpu/drm/ttm/ttm_bo_util.c
> @@ -519,6 +519,10 @@ static int ttm_bo_ioremap(struct ttm_buffer_object *bo,
> map->virtual = ioremap_wc(bo->mem.bus.base +
> bo->mem.bus.offset + offset,
> size);
> + else if (mem->placement & TTM_PL_FLAG_CACHED)
> + map->virtual = ioremap_cache(bo->mem.bus.base +
> + bo->mem.bus.offset + offset,
> + size);
> else
> map->virtual = ioremap(bo->mem.bus.base +
> bo->mem.bus.offset + offset,
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