[PATCH 1/5] drm/amdgpu: add asic callback for querying video codec info (v3)

[Christian König]

Am 25.02.21 um 21:16 schrieb Alex Deucher:
> This will be used by a new INFO ioctl query to fetch the decode
> and encode capabilities from the kernel driver rather than
> hardcoding them in mesa.  This gives us more fine grained control
> of capabilities using information that is only availabl in the
> kernel (e.g., platform limitations or bandwidth restrictions).
>
> v2: reorder the codecs to better align with mesa
> v3: add max_pixels_per_frame to handle the portrait case
>
> Reviewed-by: Leo Liu <leo.liu at amd.com> (v2)
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>

Reviewed-by: Christian König <christian.koenig at amd.com> for the series.

> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu.h | 26 ++++++++++++++++++++++++++
>   1 file changed, 26 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 22e5d9f284c3..09aec16c8feb 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -583,6 +583,28 @@ enum amd_reset_method {
>   	AMD_RESET_METHOD_PCI,
>   };
>   
> +#define AMDGPU_VIDEO_CODEC_TYPE_MPEG2			0
> +#define AMDGPU_VIDEO_CODEC_TYPE_MPEG4			1
> +#define AMDGPU_VIDEO_CODEC_TYPE_VC1			2
> +#define AMDGPU_VIDEO_CODEC_TYPE_MPEG4_AVC		3
> +#define AMDGPU_VIDEO_CODEC_TYPE_HEVC			4
> +#define AMDGPU_VIDEO_CODEC_TYPE_JPEG			5
> +#define AMDGPU_VIDEO_CODEC_TYPE_VP9			6
> +#define AMDGPU_VIDEO_CODEC_TYPE_AV1			7
> +
> +struct amdgpu_video_codec_info {
> +	u32 codec_type;
> +	u32 max_width;
> +	u32 max_height;
> +	u32 max_pixels_per_frame;
> +	u32 max_level;
> +};
> +
> +struct amdgpu_video_codecs {
> +	const u32 codec_count;
> +	const struct amdgpu_video_codec_info *codec_array;
> +};
> +
>   /*
>    * ASIC specific functions.
>    */
> @@ -627,6 +649,9 @@ struct amdgpu_asic_funcs {
>   	void (*pre_asic_init)(struct amdgpu_device *adev);
>   	/* enter/exit umd stable pstate */
>   	int (*update_umd_stable_pstate)(struct amdgpu_device *adev, bool enter);
> +	/* query video codecs */
> +	int (*query_video_codecs)(struct amdgpu_device *adev, bool encode,
> +				  const struct amdgpu_video_codecs **codecs);
>   };
>   
>   /*
> @@ -1221,6 +1246,7 @@ int emu_soc_asic_init(struct amdgpu_device *adev);
>   #define amdgpu_asic_pre_asic_init(adev) (adev)->asic_funcs->pre_asic_init((adev))
>   #define amdgpu_asic_update_umd_stable_pstate(adev, enter) \
>   	((adev)->asic_funcs->update_umd_stable_pstate ? (adev)->asic_funcs->update_umd_stable_pstate((adev), (enter)) : 0)
> +#define amdgpu_asic_query_video_codecs(adev, e, c) (adev)->asic_funcs->query_video_codecs((adev), (e), (c))
>   
>   #define amdgpu_inc_vram_lost(adev) atomic_inc(&((adev)->vram_lost_counter));
>