[PATCH] drm/amd/display: Revert "add DCN support for aarch64"

Will Deacon will at kernel.org
Tue Jan 5 13:04:58 UTC 2021


On Mon, Jan 04, 2021 at 11:27:24AM -0500, Alex Deucher wrote:
> On Tue, Dec 29, 2020 at 8:17 AM Ard Biesheuvel <ardb at kernel.org> wrote:
> >
> > On Wed, 16 Dec 2020 at 23:26, Ard Biesheuvel <ardb at kernel.org> wrote:
> > >
> > > On Wed, 16 Dec 2020 at 19:00, Alex Deucher <alexdeucher at gmail.com> wrote:
> > > >
> > > > On Mon, Dec 14, 2020 at 12:53 PM Ard Biesheuvel <ardb at kernel.org> wrote:
> > > > >
> > > > > This reverts commit c38d444e44badc557cf29fdfdfb823604890ccfa.
> > > > >
> > > > > Simply disabling -mgeneral-regs-only left and right is risky, given that
> > > > > the standard AArch64 ABI permits the use of FP/SIMD registers anywhere,
> > > > > and GCC is known to use SIMD registers for spilling, and may invent
> > > > > other uses of the FP/SIMD register file that have nothing to do with the
> > > > > floating point code in question. Note that putting kernel_neon_begin()
> > > > > and kernel_neon_end() around the code that does use FP is not sufficient
> > > > > here, the problem is in all the other code that may be emitted with
> > > > > references to SIMD registers in it.
> > > > >
> > > > > So the only way to do this properly is to put all floating point code in
> > > > > a separate compilation unit, and only compile that unit with
> > > > > -mgeneral-regs-only. But perhaps the use of floating point here is
> > > > > something that should be reconsidered entirely.
> > > > >
> > > > > Cc: Catalin Marinas <catalin.marinas at arm.com>
> > > > > Cc: Will Deacon <will at kernel.org>
> > > > > Cc: Dave Martin <dave.martin at arm.com>
> > > > > Cc: Rob Herring <robh at kernel.org>
> > > > > Cc: Leo Li <sunpeng.li at amd.com>
> > > > > Cc: Alex Deucher <alexander.deucher at amd.com>
> > > > > Cc: "Christian König" <christian.koenig at amd.com>
> > > > > Cc: David Airlie <airlied at linux.ie>
> > > > > Cc: Daniel Vetter <daniel at ffwll.ch>
> > > > > Cc: Daniel Kolesa <daniel at octaforge.org>
> > > > > Cc: amd-gfx at lists.freedesktop.org
> > > > > Cc: dri-devel at lists.freedesktop.org
> > > > > Signed-off-by: Ard Biesheuvel <ardb at kernel.org>
> > > >
> > > > Can rebase this on Linus' master branch?  There were a number of new
> > > > asics added which copy pasted the ARM64 support.
> > > >
> > >
> > > Not sure what you are asking me here. Reverting commit c38d444e44badc5
> > > on top of mainline is not going to fix the other code that was added.
> > > Or are you asking me to go and find the patches (how many?) that added
> > > new ASICs and fix them for arm64?
> > >
> > > Note that this code is critically broken, as it may corrupt user
> > > process state arbitrarily. So if new code was added that contains the
> > > same bug, it should be reverted so that the respective authors can fix
> > > it and resubmit.
> > >
> >
> > Is this simply about dropping the newly added references to
> > $(dml_rcflags) from the Makefile? Because that is quite trivial ...
> 
> Yes, I was thinking something like the attached patch.
> 
> Alex

> From fbc93ca7d7739861ce63f6b483cf23d7cf1d69fb Mon Sep 17 00:00:00 2001
> From: Alex Deucher <alexander.deucher at amd.com>
> Date: Mon, 4 Jan 2021 11:24:20 -0500
> Subject: [PATCH] drm/amdgpu/display: drop DCN support for aarch64
> 
> From Ard:
> 
> "Simply disabling -mgeneral-regs-only left and right is risky, given that
> the standard AArch64 ABI permits the use of FP/SIMD registers anywhere,
> and GCC is known to use SIMD registers for spilling, and may invent
> other uses of the FP/SIMD register file that have nothing to do with the
> floating point code in question. Note that putting kernel_neon_begin()
> and kernel_neon_end() around the code that does use FP is not sufficient
> here, the problem is in all the other code that may be emitted with
> references to SIMD registers in it.
> 
> So the only way to do this properly is to put all floating point code in
> a separate compilation unit, and only compile that unit with
> -mgeneral-regs-only."
> 
> Disable support until the code can be properly refactored to support this
> properly on aarch64.
> 
> Reported-by: Ard Biesheuvel <ardb at kernel.org>
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
> ---
>  drivers/gpu/drm/amd/display/Kconfig           |  2 +-
>  drivers/gpu/drm/amd/display/dc/calcs/Makefile |  4 ----
>  .../gpu/drm/amd/display/dc/clk_mgr/Makefile   | 21 -------------------
>  drivers/gpu/drm/amd/display/dc/dcn10/Makefile |  7 -------
>  .../drm/amd/display/dc/dcn10/dcn10_resource.c |  7 -------
>  drivers/gpu/drm/amd/display/dc/dcn20/Makefile |  4 ----
>  drivers/gpu/drm/amd/display/dc/dcn21/Makefile |  4 ----
>  drivers/gpu/drm/amd/display/dc/dcn30/Makefile |  5 -----
>  .../gpu/drm/amd/display/dc/dcn301/Makefile    |  4 ----
>  .../gpu/drm/amd/display/dc/dcn302/Makefile    |  4 ----
>  drivers/gpu/drm/amd/display/dc/dml/Makefile   |  4 ----
>  drivers/gpu/drm/amd/display/dc/dsc/Makefile   |  4 ----
>  drivers/gpu/drm/amd/display/dc/os_types.h     |  4 ----
>  13 files changed, 1 insertion(+), 73 deletions(-)

Acked-by: Will Deacon <will at kernel.org>

Will


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