[PATCH 2/3] drm/amdgpu: Correct the read sclk for navi10

[Deng, Emily]

[AMD Official Use Only - Internal Distribution Only]

>-----Original Message-----
>From: Quan, Evan <Evan.Quan at amd.com>
>Sent: Tuesday, January 5, 2021 5:07 PM
>To: Deng, Emily <Emily.Deng at amd.com>; amd-gfx at lists.freedesktop.org
>Cc: Deng, Emily <Emily.Deng at amd.com>
>Subject: RE: [PATCH 2/3] drm/amdgpu: Correct the read sclk for navi10
>
>[AMD Official Use Only - Internal Distribution Only]
>
>What's the issue with original implementation?
> And does other clock domains(e.g uclk) need this fix also?
According to smu team, after navi10, it will use dfll mode, for sclk read from CurrClock is not correct, need to read from AverageGfxclkFrequency in SmuMetrics_t. Will add this in comment.
>
>-----Original Message-----
>From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of
>Emily.Deng
>Sent: Tuesday, January 5, 2021 4:37 PM
>To: amd-gfx at lists.freedesktop.org
>Cc: Deng, Emily <Emily.Deng at amd.com>
>Subject: [PATCH 2/3] drm/amdgpu: Correct the read sclk for navi10
>
>Signed-off-by: Emily.Deng <Emily.Deng at amd.com>
>---
> drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
>b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
>index 51e83123f72a..7ebf9588983f 100644
>--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
>+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
>@@ -1673,7 +1673,7 @@ static int navi10_read_sensor(struct smu_context
>*smu,  *size = 4;  break;  case AMDGPU_PP_SENSOR_GFX_SCLK:
>-ret = navi10_get_current_clk_freq_by_table(smu, SMU_GFXCLK, (uint32_t
>*)data);
>+ret = navi10_get_smu_metrics_data(smu, METRICS_AVERAGE_GFXCLK,
>+(uint32_t *)data);
> *(uint32_t *)data *= 100;
> *size = 4;
> break;
>--
>2.25.1
>
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