[PATCH 06/21] drm/amd/display: Remove HUBP_DISABLE from default

Rodrigo Siqueira Rodrigo.Siqueira at amd.com
Fri Jan 8 21:49:52 UTC 2021


From: Wesley Chalmers <Wesley.Chalmers at amd.com>

[WHY]
HW team plans to rename HUBP_DISABLE to HUBP_SOFT_RESET in future HW
revisions. Those future revisions should not inherit the HUBP_DISABLE
name.

Signed-off-by: Wesley Chalmers <Wesley.Chalmers at amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr at amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira at amd.com>
---
 .../gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h |  2 +-
 .../gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h | 22 ++++++++++++++-----
 2 files changed, 18 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h
index a9a6ed7f4f99..80794fed6e20 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h
@@ -450,7 +450,6 @@
 
 #define DCN_HUBP_REG_FIELD_BASE_LIST(type) \
 	type HUBP_BLANK_EN;\
-	type HUBP_DISABLE;\
 	type HUBP_TTU_DISABLE;\
 	type HUBP_NO_OUTSTANDING_REQ;\
 	type HUBP_VTG_SEL;\
@@ -644,6 +643,7 @@
 
 #define DCN_HUBP_REG_FIELD_LIST(type) \
 	DCN_HUBP_REG_FIELD_BASE_LIST(type);\
+	type HUBP_DISABLE;\
 	type ALPHA_PLANE_EN
 
 struct dcn_mi_registers {
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h
index f501c02c244b..98ec1f9171b6 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h
@@ -161,7 +161,7 @@
 	DCN21_HUBP_REG_COMMON_VARIABLE_LIST;\
 	uint32_t DCN_DMDATA_VM_CNTL
 
-#define DCN2_HUBP_REG_FIELD_VARIABLE_LIST(type) \
+#define DCN2_HUBP_REG_FIELD_VARIABLE_LIST_COMMON(type) \
 	DCN_HUBP_REG_FIELD_BASE_LIST(type); \
 	type DMDATA_ADDRESS_HIGH;\
 	type DMDATA_MODE;\
@@ -186,8 +186,12 @@
 	type SURFACE_TRIPLE_BUFFER_ENABLE;\
 	type VMID
 
-#define DCN21_HUBP_REG_FIELD_VARIABLE_LIST(type) \
-	DCN2_HUBP_REG_FIELD_VARIABLE_LIST(type);\
+#define DCN2_HUBP_REG_FIELD_VARIABLE_LIST(type) \
+	DCN2_HUBP_REG_FIELD_VARIABLE_LIST_COMMON(type); \
+	type HUBP_DISABLE
+
+#define DCN21_HUBP_REG_FIELD_VARIABLE_LIST_COMMON(type) \
+	DCN2_HUBP_REG_FIELD_VARIABLE_LIST_COMMON(type);\
 	type REFCYC_PER_VM_GROUP_FLIP;\
 	type REFCYC_PER_VM_REQ_FLIP;\
 	type REFCYC_PER_VM_GROUP_VBLANK;\
@@ -196,8 +200,12 @@
 	type REFCYC_PER_META_CHUNK_FLIP_C; \
 	type VM_GROUP_SIZE
 
-#define DCN30_HUBP_REG_FIELD_VARIABLE_LIST(type) \
-	DCN21_HUBP_REG_FIELD_VARIABLE_LIST(type);\
+#define DCN21_HUBP_REG_FIELD_VARIABLE_LIST(type) \
+	DCN21_HUBP_REG_FIELD_VARIABLE_LIST_COMMON(type);\
+	type HUBP_DISABLE
+
+#define DCN30_HUBP_REG_FIELD_VARIABLE_LIST_COMMON(type) \
+	DCN21_HUBP_REG_FIELD_VARIABLE_LIST_COMMON(type);\
 	type PRIMARY_SURFACE_DCC_IND_BLK;\
 	type SECONDARY_SURFACE_DCC_IND_BLK;\
 	type PRIMARY_SURFACE_DCC_IND_BLK_C;\
@@ -216,6 +224,10 @@
 	type ROW_TTU_MODE; \
 	type NUM_PKRS
 
+#define DCN30_HUBP_REG_FIELD_VARIABLE_LIST(type) \
+	DCN30_HUBP_REG_FIELD_VARIABLE_LIST_COMMON(type);\
+	type HUBP_DISABLE
+
 struct dcn_hubp2_registers {
 	DCN30_HUBP_REG_COMMON_VARIABLE_LIST;
 };
-- 
2.25.1



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