[PATCH 0/3] idle optimization patches (mall)

Bhawanpreet Lakha Bhawanpreet.Lakha at amd.com
Tue Jan 19 20:38:07 UTC 2021


There is some missing mall code, this series updates the code.
-enable watermark programming
-dynamic cursor cache
-updates to mall eligibility check

Bhawanpreet Lakha (3):
  drm/amd/display: Enable programing of MALL watermarks
  drm/amd/display: Dynamic cursor cache size for MALL eligibility check
  drm/amd/display: Update dcn30_apply_idle_power_optimizations() code

 .../display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c  |  18 +-
 drivers/gpu/drm/amd/display/dc/core/dc.c      |   6 +-
 drivers/gpu/drm/amd/display/dc/dc.h           |   6 +-
 .../drm/amd/display/dc/dcn30/dcn30_hwseq.c    | 182 ++++++++++++++----
 .../drm/amd/display/dc/dcn30/dcn30_hwseq.h    |   3 +-
 .../amd/display/dc/dcn302/dcn302_resource.c   |   5 +-
 .../gpu/drm/amd/display/dc/inc/hw_sequencer.h |   3 +-
 .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h   |   5 +
 8 files changed, 171 insertions(+), 57 deletions(-)

-- 
2.25.1



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