[PATCH] drm/amd/pm: Enable gfx DCS feature

Thu Jan 28 02:09:10 UTC 2021

[AMD Official Use Only - Internal Distribution Only]

Hi Alex,

Yes, SMU acts differently with regard to DCS when you set different workloads via the workload interface. So, Kenneth seems right.
But I think the dcs feature disablement needs to be placed before SMU_MSG_SetWorkloadMask(some code as below). Otherwise, it seems the DCS mode switching happens first(during SMU_MSG_SetWorkloadMask) and the disablement comes afterwards.

+/* have to disable dcs if it's the 3D fullscreen or VR workload type */
+if (smu->adev->asic_type == CHIP_NAVY_FLOUNDER ||
+smu->adev->asic_type == CHIP_DIMGREY_CAVEFISH) {
+ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_GFX_DCS_BIT, (workload_type ==
+WORKLOAD_PPLIB_FULL_SCREEN_3D_BIT || workload_type == WORKLOAD_PPLIB_VR_BIT) ? 0 : 1);
+if (ret)
+return ret;
+}
+
smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetWorkloadMask,
     1 << workload_type, NULL);

BR
Evan
-----Original Message-----
From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of Alex Deucher
Sent: Thursday, January 28, 2021 1:49 AM
To: Feng, Kenneth <Kenneth.Feng at amd.com>
Cc: Zhou1, Tao <Tao.Zhou1 at amd.com>; amd-gfx list <amd-gfx at lists.freedesktop.org>
Subject: Re: [PATCH] drm/amd/pm: Enable gfx DCS feature

On Wed, Jan 27, 2021 at 12:57 AM Feng, Kenneth <Kenneth.Feng at amd.com> wrote:
>
> [AMD Official Use Only - Internal Distribution Only]
>
> Hi Alex,
> Actually the FA DCS is dependent on the workload type.
> FA DCS is applied only when there's 3D fullscreen workload or VR workload.
> So we need to disable it if there's a request from the sysfs/user to set the workload type to 3D fullscreen or VR type because we don't have FA DCS so far.
> By removing this hunk is ok functionally, but the DCS will never kick in though the DCS is enabled. That might be a little bit confusing.
> Thanks.

For clarity, does the SMU act differently with regard to DCS when you set different workloads via the workload interface or is this just using the assumption that at some point we might dynamically adjust the workload bits based on hints from userspace?

Alex

>
>
>
> -----Original Message-----
> From: Alex Deucher <alexdeucher at gmail.com>
> Sent: Wednesday, January 27, 2021 12:55 PM
> To: Feng, Kenneth <Kenneth.Feng at amd.com>
> Cc: amd-gfx list <amd-gfx at lists.freedesktop.org>; Zhou1, Tao
> <Tao.Zhou1 at amd.com>
> Subject: Re: [PATCH] drm/amd/pm: Enable gfx DCS feature
>
> [CAUTION: External Email]
>
> On Tue, Jan 26, 2021 at 8:42 PM Kenneth Feng <kenneth.feng at amd.com> wrote:
> >
> > Background:
> > Gfx Duty Cycle Scaling(DCS) is applied on the small power limit skus.
> > When the current/power/temperature exceeds the limit with the heavy
> > workload, the gfx core can be shut off and powered on back and forth.
> > The ON time and OFF time is determined by the firmware according to
> > the accumulated power credits.
> > This feature is different from gfxoff.Gfxoff is applied in the idle
> > case and DCS is applied in the case with heavey workload.There are two types of DCS:
> > Async DCS and Frame-aligned DCS.Frame-aligned DCS is applied on 3D
> > fullscreen and VR workload.
> > Since we only supports Async DCS now,disalbe DCS when the 3D
> > fullscreen or the VR workload type is chosen.
> >
> > Verification:
> > The power is lowerer or the perf/watt is increased in the throttling case.
> > To be simplified, the entry/exit counter can be observed from the firmware.
> >
> > Signed-off-by: Kenneth Feng <kenneth.feng at amd.com>
> > ---
> >  .../gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c  | 12
> > ++++++++++++
> >  1 file changed, 12 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> > b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> > index 24f3c96a5e5e..436d94cbb166 100644
> > --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> > +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> > @@ -261,6 +261,9 @@ sienna_cichlid_get_allowed_feature_mask(struct smu_context *smu,
> >                 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_GFX_GPO_BIT);
> >         }
> >
> > +       if (adev->asic_type == CHIP_NAVY_FLOUNDER || adev->asic_type == CHIP_DIMGREY_CAVEFISH)
> > +               *(uint64_t *)feature_mask |=
> > + FEATURE_MASK(FEATURE_GFX_DCS_BIT);
> > +
> >         if (adev->pm.pp_feature & PP_MCLK_DPM_MASK)
> >                 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_UCLK_BIT)
> >                                         |
> > FEATURE_MASK(FEATURE_MEM_VDDCI_SCALING_BIT)
> > @@ -1437,6 +1440,15 @@ static int sienna_cichlid_set_power_profile_mode(struct smu_context *smu, long *
> >         smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetWorkloadMask,
> >                                     1 << workload_type, NULL);
> >
> > +       /* have to disable dcs if it's the 3D fullscreen or VR workload type */
> > +       if (smu->adev->asic_type == CHIP_NAVY_FLOUNDER ||
> > +               smu->adev->asic_type == CHIP_DIMGREY_CAVEFISH) {
> > +               ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_GFX_DCS_BIT, (workload_type ==
> > +                       WORKLOAD_PPLIB_FULL_SCREEN_3D_BIT || workload_type == WORKLOAD_PPLIB_VR_BIT) ? 0 : 1);
> > +               if (ret)
> > +                       return ret;
> > +       }
> > +
>
> Since we don't support FA DCS yet, should we just drop this hunk for now?  I think the workload profile stuff should be independent of FA DCS.  Also so we want to add a ppfeaturemask flag to easily allow us to disable this at driver load time?
>
> Alex
>
>
> >         return ret;
> >  }
> >
> > --
> > 2.17.1
> >
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