[PATCH 2/2] drm/amd/pm: restore user customized OD settings properly for Sienna Cichlid

[Evan Quan]

Properly restore those committed and non-committed user customized OD
settings.

Change-Id: I25396df0b3ecdd7a0d9fc77ed220b0abf1fde020
Signed-off-by: Evan Quan <evan.quan at amd.com>
---
 drivers/gpu/drm/amd/pm/inc/smu_v11_0.h           |  2 ++
 drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c  | 15 +--------------
 .../drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c  | 16 +++++++++++++---
 drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c   | 13 +++++++++++++
 4 files changed, 29 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h b/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h
index 385b2ea5379c..7bf25efc3936 100644
--- a/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h
+++ b/drivers/gpu/drm/amd/pm/inc/smu_v11_0.h
@@ -302,5 +302,7 @@ void smu_v11_0_interrupt_work(struct smu_context *smu);
 
 int smu_v11_0_set_light_sbr(struct smu_context *smu, bool enable);
 
+int smu_v11_0_restore_committed_od_settings(struct smu_context *smu);
+
 #endif
 #endif
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index 4752299d7f91..fbd29129550a 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -2513,19 +2513,6 @@ static int navi10_od_edit_dpm_table(struct smu_context *smu, enum PP_OD_DPM_TABL
 	return ret;
 }
 
-static int navi10_restore_committed_od_settings(struct smu_context *smu)
-{
-	struct smu_table_context *table_context = &smu->smu_table;
-	void *od_table = table_context->committed_overdrive_table;
-	int ret = 0;
-
-	ret = smu_cmn_update_table(smu, SMU_TABLE_OVERDRIVE, 0, (void *)od_table, true);
-	if (ret)
-		dev_err(smu->adev->dev, "Failed to import overdrive table!\n");
-
-	return ret;
-}
-
 static int navi10_run_btc(struct smu_context *smu)
 {
 	int ret = 0;
@@ -3289,7 +3276,7 @@ static const struct pptable_funcs navi10_ppt_funcs = {
 	.set_soft_freq_limited_range = smu_v11_0_set_soft_freq_limited_range,
 	.set_default_od_settings = navi10_set_default_od_settings,
 	.od_edit_dpm_table = navi10_od_edit_dpm_table,
-	.restore_committed_od_settings = navi10_restore_committed_od_settings,
+	.restore_committed_od_settings = smu_v11_0_restore_committed_od_settings,
 	.run_btc = navi10_run_btc,
 	.set_power_source = smu_v11_0_set_power_source,
 	.get_pp_feature_mask = smu_cmn_get_pp_feature_mask,
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
index e0638dc3f617..f0a7dc1d1640 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
@@ -1957,15 +1957,16 @@ static int sienna_cichlid_set_default_od_settings(struct smu_context *smu)
 	int ret = 0;
 
 	ret = smu_cmn_update_table(smu, SMU_TABLE_OVERDRIVE,
-				   0, (void *)od_table, false);
+				   0, (void *)boot_od_table, false);
 	if (ret) {
 		dev_err(smu->adev->dev, "Failed to get overdrive table!\n");
 		return ret;
 	}
 
-	memcpy(boot_od_table, od_table, sizeof(OverDriveTable_t));
+	sienna_cichlid_dump_od_table(smu, boot_od_table);
 
-	sienna_cichlid_dump_od_table(smu, od_table);
+	if (!smu->adev->in_suspend)
+		memcpy(od_table, boot_od_table, sizeof(OverDriveTable_t));
 
 	return 0;
 }
@@ -2136,6 +2137,14 @@ static int sienna_cichlid_od_edit_dpm_table(struct smu_context *smu,
 			dev_err(smu->adev->dev, "Failed to import overdrive table!\n");
 			return ret;
 		}
+		if (memcmp(table_context->overdrive_table, table_context->boot_overdrive_table,
+			sizeof(OverDriveTable_t))) {
+			smu->user_dpm_profile.committed_od = true;
+			memcpy(table_context->committed_overdrive_table, table_context->overdrive_table,
+					sizeof(OverDriveTable_t));
+		} else {
+			smu->user_dpm_profile.committed_od = false;
+		}
 		break;
 
 	case PP_OD_EDIT_VDDGFX_OFFSET:
@@ -3902,6 +3911,7 @@ static const struct pptable_funcs sienna_cichlid_ppt_funcs = {
 	.set_soft_freq_limited_range = smu_v11_0_set_soft_freq_limited_range,
 	.set_default_od_settings = sienna_cichlid_set_default_od_settings,
 	.od_edit_dpm_table = sienna_cichlid_od_edit_dpm_table,
+	.restore_committed_od_settings = smu_v11_0_restore_committed_od_settings,
 	.run_btc = sienna_cichlid_run_btc,
 	.set_power_source = smu_v11_0_set_power_source,
 	.get_pp_feature_mask = smu_cmn_get_pp_feature_mask,
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
index 28fc3f17c1b1..323126a7ca49 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
@@ -2113,3 +2113,16 @@ int smu_v11_0_deep_sleep_control(struct smu_context *smu,
 
 	return ret;
 }
+
+int smu_v11_0_restore_committed_od_settings(struct smu_context *smu)
+{
+	struct smu_table_context *table_context = &smu->smu_table;
+	void *od_table = table_context->committed_overdrive_table;
+	int ret = 0;
+
+	ret = smu_cmn_update_table(smu, SMU_TABLE_OVERDRIVE, 0, (void *)od_table, true);
+	if (ret)
+		dev_err(smu->adev->dev, "Failed to import overdrive table!\n");
+
+	return ret;
+}
-- 
2.29.0