[PATCH 10/14] drm/amd/display: Always wait for update lock status

[Solomon Chiu]

From: Eric Bernstein <eric.bernstein at amd.com>

Remove code that would skip wait for lock status for Diags
FPGA case

Reviewed-by: Laktyushkin Dmytro <dmytro.laktyushkin at amd.com>
Acked-by: Solomon Chiu <solomon.chiu at amd.com>
Signed-off-by: Eric Bernstein <eric.bernstein at amd.com>
---
 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c
index f37e8254df21..089be7347591 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c
@@ -109,11 +109,9 @@ void optc3_lock(struct timing_generator *optc)
 	REG_SET(OTG_MASTER_UPDATE_LOCK, 0,
 		OTG_MASTER_UPDATE_LOCK, 1);
 
-	/* Should be fast, status does not update on maximus */
-	if (optc->ctx->dce_environment != DCE_ENV_FPGA_MAXIMUS)
-		REG_WAIT(OTG_MASTER_UPDATE_LOCK,
-				UPDATE_LOCK_STATUS, 1,
-				1, 10);
+	REG_WAIT(OTG_MASTER_UPDATE_LOCK,
+			UPDATE_LOCK_STATUS, 1,
+			1, 10);
 }
 
 void optc3_set_out_mux(struct timing_generator *optc, enum otg_out_mux_dest dest)
-- 
2.25.1