[PATCH v2] drm/amdgpu: fix the doorbell missing when in CGPG issue for renoir.

[Alex Deucher]

On Wed, Jul 28, 2021 at 2:10 AM Yifan Zhang <yifan1.zhang at amd.com> wrote:
>
> If GC has entered CGPG, ringing doorbell > first page doesn't wakeup GC.
> Enlarge CP_MEC_DOORBELL_RANGE_UPPER to workaround this issue.
>
> Signed-off-by: Yifan Zhang <yifan1.zhang at amd.com>

I assume this won't break gfxoff?  The last time we changed this, it
broke a bunch of scenarios.  Won't this cause just about all doorbells
to wake gfx?

Alex

> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 10 +++++++++-
>  1 file changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 03acc777adf7..70b64b510743 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -3675,7 +3675,15 @@ static int gfx_v9_0_kiq_init_register(struct amdgpu_ring *ring)
>         if (ring->use_doorbell) {
>                 WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_LOWER,
>                                         (adev->doorbell_index.kiq * 2) << 2);
> -               WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER,
> +               /* In renoir, if GC has entered CGPG, ringing doorbell > first page
> +                * doesn't wakeup GC. Enlarge CP_MEC_DOORBELL_RANGE_UPPER to
> +                * workaround this issue.
> +                */
> +               if (adev->asic_type == CHIP_RENOIR)
> +                       WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER,
> +                                       (adev->doorbell.size - 4));
> +               else
> +                       WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER,
>                                         (adev->doorbell_index.userqueue_end * 2) << 2);
>         }
>
> --
> 2.25.1
>
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