[RFC PATCH v3 2/6] drm/color: Add transfer functions for HDR/SDR on drm_plane
Harry Wentland
harry.wentland at amd.com
Fri Jul 30 20:41:30 UTC 2021
From: Bhawanpreet Lakha <Bhawanpreet.Lakha at amd.com>
Due to the way displays and human vision work it is most effective to
encode luminance information in a non-linear space.
For SDR this non-linear mapping is assumed to roughly use a gamma 2.2 curve.
This was due to the way CRTs worked and was fine for SDR content with a
low luminance range.
The large luminance range (0-10,000 nits) for HDR exposes some
short-comings of a simple gamma curve that have been addressed
through various Electro-Optical Transfer Functions (EOTFs).
Rather than assuming how framebuffer content is encoded we want to
make sure userspace presenting HDR content is explicit about the
EOTF of the content, so a driver can decide whether the content
can be supported or not.
This Patch adds common transfer functions for SDR/HDR. These can
be used to communicate with the driver regarding the transformation to
use for a given plane.
enums added:
DRM_TF_UNDEFINED
the legacy case where the TF in/out of blending space is
undefined
DRM_TF_SRGB
roughly 2.4 gamma with initial linear section
DRM_TF_BT709
Similar to Gamma 2.2-2.8
DRM_TF_PQ2084
most common tf used for HDR video (HDR10/Dolby). Can support up
to 10,000 nits
The usage is similar to color_encoding and color_range where the driver
can specify the default and supported tfs and pass it into
drm_plane_create_color_properties().
v2:
- drop "color" from transfer function name (Harry)
- add DRM_TF_UNDEFINED enum as legacy default (Harry)
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha at amd.com>
Signed-off-by: Harry Wentland <harry.wentland at amd.com>
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 +-
.../gpu/drm/arm/display/komeda/komeda_plane.c | 4 +-
drivers/gpu/drm/arm/malidp_planes.c | 4 +-
drivers/gpu/drm/armada/armada_overlay.c | 4 +-
drivers/gpu/drm/drm_atomic_uapi.c | 4 ++
drivers/gpu/drm/drm_color_mgmt.c | 64 +++++++++++++++++--
drivers/gpu/drm/i915/display/intel_sprite.c | 4 +-
.../drm/i915/display/skl_universal_plane.c | 4 +-
drivers/gpu/drm/nouveau/dispnv04/overlay.c | 4 +-
drivers/gpu/drm/omapdrm/omap_plane.c | 4 +-
drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 4 +-
drivers/gpu/drm/tidss/tidss_plane.c | 6 +-
include/drm/drm_color_mgmt.h | 18 +++++-
include/drm/drm_plane.h | 16 +++++
14 files changed, 128 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index b5b5ccf0ed71..63ddae9c5abe 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -7276,7 +7276,9 @@ static int amdgpu_dm_plane_init(struct amdgpu_display_manager *dm,
BIT(DRM_COLOR_YCBCR_BT2020),
BIT(DRM_COLOR_YCBCR_LIMITED_RANGE) |
BIT(DRM_COLOR_YCBCR_FULL_RANGE),
- DRM_COLOR_YCBCR_BT709, DRM_COLOR_YCBCR_LIMITED_RANGE);
+ BIT(DRM_TF_SRGB),
+ DRM_COLOR_YCBCR_BT709, DRM_COLOR_YCBCR_LIMITED_RANGE,
+ DRM_TF_SRGB);
}
supported_rotations =
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_plane.c b/drivers/gpu/drm/arm/display/komeda/komeda_plane.c
index d63d83800a8a..811f79ab6d32 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_plane.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_plane.c
@@ -302,8 +302,10 @@ static int komeda_plane_add(struct komeda_kms_dev *kms,
BIT(DRM_COLOR_YCBCR_BT2020),
BIT(DRM_COLOR_YCBCR_LIMITED_RANGE) |
BIT(DRM_COLOR_YCBCR_FULL_RANGE),
+ BIT(DRM_TF_UNDEFINED),
DRM_COLOR_YCBCR_BT601,
- DRM_COLOR_YCBCR_LIMITED_RANGE);
+ DRM_COLOR_YCBCR_LIMITED_RANGE,
+ DRM_TF_UNDEFINED);
if (err)
goto cleanup;
diff --git a/drivers/gpu/drm/arm/malidp_planes.c b/drivers/gpu/drm/arm/malidp_planes.c
index 8c2ab3d653b7..98d308262880 100644
--- a/drivers/gpu/drm/arm/malidp_planes.c
+++ b/drivers/gpu/drm/arm/malidp_planes.c
@@ -1030,7 +1030,9 @@ int malidp_de_planes_init(struct drm_device *drm)
BIT(DRM_COLOR_YCBCR_BT2020),
BIT(DRM_COLOR_YCBCR_LIMITED_RANGE) | \
BIT(DRM_COLOR_YCBCR_FULL_RANGE),
- enc, range);
+ BIT(DRM_TF_UNDEFINED),
+ enc, range,
+ DRM_TF_UNDEFINED);
if (!ret)
/* program the HW registers */
malidp_de_set_color_encoding(plane, enc, range);
diff --git a/drivers/gpu/drm/armada/armada_overlay.c b/drivers/gpu/drm/armada/armada_overlay.c
index d3e3e5fdc390..f7792444cb73 100644
--- a/drivers/gpu/drm/armada/armada_overlay.c
+++ b/drivers/gpu/drm/armada/armada_overlay.c
@@ -596,8 +596,10 @@ int armada_overlay_plane_create(struct drm_device *dev, unsigned long crtcs)
BIT(DRM_COLOR_YCBCR_BT601) |
BIT(DRM_COLOR_YCBCR_BT709),
BIT(DRM_COLOR_YCBCR_LIMITED_RANGE),
+ BIT(DRM_TF_UNDEFINED),
DEFAULT_ENCODING,
- DRM_COLOR_YCBCR_LIMITED_RANGE);
+ DRM_COLOR_YCBCR_LIMITED_RANGE,
+ DRM_TF_UNDEFINED);
return ret;
}
diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c
index 7e48d40600ff..9582515dd12e 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -596,6 +596,8 @@ static int drm_atomic_plane_set_property(struct drm_plane *plane,
state->color_encoding = val;
} else if (property == plane->color_range_property) {
state->color_range = val;
+ } else if (property == plane->transfer_function_property) {
+ state->transfer_function = val;
} else if (property == config->prop_fb_damage_clips) {
ret = drm_atomic_replace_property_blob_from_id(dev,
&state->fb_damage_clips,
@@ -662,6 +664,8 @@ drm_atomic_plane_get_property(struct drm_plane *plane,
*val = state->color_encoding;
} else if (property == plane->color_range_property) {
*val = state->color_range;
+ } else if (property == plane->transfer_function_property) {
+ *val = state->transfer_function;
} else if (property == config->prop_fb_damage_clips) {
*val = (state->fb_damage_clips) ?
state->fb_damage_clips->base.id : 0;
diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c
index bb14f488c8f6..daf62fb090a6 100644
--- a/drivers/gpu/drm/drm_color_mgmt.c
+++ b/drivers/gpu/drm/drm_color_mgmt.c
@@ -106,6 +106,11 @@
* Optional plane enum property to support different non RGB
* color parameter ranges. The driver can provide a subset of
* standard enum values supported by the DRM plane.
+ *
+ * "COLOR_TRANFER_FUNCTION":
+ * Optional plane enum property to support different
+ * color luminance mappings. The driver can provide a subset of
+ * standard enum values supported by the DRM plane.
*/
/**
@@ -476,6 +481,11 @@ static const char * const color_range_name[] = {
[DRM_COLOR_YCBCR_LIMITED_RANGE] = "YCbCr limited range",
};
+static const char * const tf_name[] = {
+ [DRM_TF_UNDEFINED] = "undefined",
+ [DRM_TF_SRGB] = "sRGB",
+ [DRM_TF_PQ2084] = "PQ2084",
+};
/**
* drm_get_color_encoding_name - return a string for color encoding
* @encoding: color encoding to compute name of
@@ -506,30 +516,49 @@ const char *drm_get_color_range_name(enum drm_color_range range)
return color_range_name[range];
}
+/**
+ * drm_get_transfer_function - return a string for transfer function
+ * @tf: transfer function to compute name of
+ *
+ * In contrast to the other drm_get_*_name functions this one here returns a
+ * const pointer and hence is threadsafe.
+ */
+const char *drm_get_transfer_function_name(enum drm_transfer_function tf)
+{
+ if (WARN_ON(tf >= ARRAY_SIZE(tf_name)))
+ return "unknown";
+
+ return tf_name[tf];
+}
/**
* drm_plane_create_color_properties - color encoding related plane properties
* @plane: plane object
* @supported_encodings: bitfield indicating supported color encodings
* @supported_ranges: bitfileld indicating supported color ranges
+ * @supported_tfs: bitfield indicating supported transfer functions
* @default_encoding: default color encoding
* @default_range: default color range
+ * @default_tf: default color transfer function
*
- * Create and attach plane specific COLOR_ENCODING and COLOR_RANGE
- * properties to @plane. The supported encodings and ranges should
- * be provided in supported_encodings and supported_ranges bitmasks.
+ * Create and attach plane specific COLOR_ENCODING, COLOR_RANGE and TRANSFER_FUNCTION
+ * properties to @plane. The supported encodings, ranges and tfs should
+ * be provided in supported_encodings, supported_ranges and supported_tfs bitmasks.
* Each bit set in the bitmask indicates that its number as enum
* value is supported.
*/
int drm_plane_create_color_properties(struct drm_plane *plane,
u32 supported_encodings,
u32 supported_ranges,
+ u32 supported_tfs,
enum drm_color_encoding default_encoding,
- enum drm_color_range default_range)
+ enum drm_color_range default_range,
+ enum drm_transfer_function default_tf)
{
struct drm_device *dev = plane->dev;
struct drm_property *prop;
struct drm_prop_enum_list enum_list[max_t(int, DRM_COLOR_ENCODING_MAX,
- DRM_COLOR_RANGE_MAX)];
+ max_t(int, DRM_COLOR_RANGE_MAX,
+ DRM_TF_MAX))];
int i, len;
if (WARN_ON(supported_encodings == 0 ||
@@ -542,6 +571,11 @@ int drm_plane_create_color_properties(struct drm_plane *plane,
(supported_ranges & BIT(default_range)) == 0))
return -EINVAL;
+ if (WARN_ON(supported_tfs == 0 ||
+ (supported_tfs & -BIT(DRM_TF_MAX)) != 0 ||
+ (supported_tfs & BIT(default_tf)) == 0))
+ return -EINVAL;
+
len = 0;
for (i = 0; i < DRM_COLOR_ENCODING_MAX; i++) {
if ((supported_encodings & BIT(i)) == 0)
@@ -580,6 +614,26 @@ int drm_plane_create_color_properties(struct drm_plane *plane,
if (plane->state)
plane->state->color_range = default_range;
+
+ len = 0;
+ for (i = 0; i < DRM_TF_MAX; i++) {
+ if ((supported_tfs & BIT(i)) == 0)
+ continue;
+
+ enum_list[len].type = i;
+ enum_list[len].name = tf_name[i];
+ len++;
+ }
+
+ prop = drm_property_create_enum(dev, 0, "TRANSFER_FUNCTION",
+ enum_list, len);
+ if (!prop)
+ return -ENOMEM;
+ plane->transfer_function_property = prop;
+ drm_object_attach_property(&plane->base, prop, default_tf);
+ if (plane->state)
+ plane->state->transfer_function = default_tf;
+
return 0;
}
EXPORT_SYMBOL(drm_plane_create_color_properties);
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index 4ae9a7455b23..b3f7aca3795b 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -1850,8 +1850,10 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
BIT(DRM_COLOR_YCBCR_BT709),
BIT(DRM_COLOR_YCBCR_LIMITED_RANGE) |
BIT(DRM_COLOR_YCBCR_FULL_RANGE),
+ BIT(DRM_TF_UNDEFINED),
DRM_COLOR_YCBCR_BT709,
- DRM_COLOR_YCBCR_LIMITED_RANGE);
+ DRM_COLOR_YCBCR_LIMITED_RANGE,
+ DRM_TF_UNDEFINED);
zpos = sprite + 1;
drm_plane_create_zpos_immutable_property(&plane->base, zpos);
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 92a4fd508e92..df596431151d 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -2160,8 +2160,10 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
supported_csc,
BIT(DRM_COLOR_YCBCR_LIMITED_RANGE) |
BIT(DRM_COLOR_YCBCR_FULL_RANGE),
+ BIT(DRM_TF_UNDEFINED),
DRM_COLOR_YCBCR_BT709,
- DRM_COLOR_YCBCR_LIMITED_RANGE);
+ DRM_COLOR_YCBCR_LIMITED_RANGE,
+ DRM_TF_UNDEFINED);
drm_plane_create_alpha_property(&plane->base);
drm_plane_create_blend_mode_property(&plane->base,
diff --git a/drivers/gpu/drm/nouveau/dispnv04/overlay.c b/drivers/gpu/drm/nouveau/dispnv04/overlay.c
index 37e63e98cd08..64e1793212b4 100644
--- a/drivers/gpu/drm/nouveau/dispnv04/overlay.c
+++ b/drivers/gpu/drm/nouveau/dispnv04/overlay.c
@@ -345,8 +345,10 @@ nv10_overlay_init(struct drm_device *device)
BIT(DRM_COLOR_YCBCR_BT601) |
BIT(DRM_COLOR_YCBCR_BT709),
BIT(DRM_COLOR_YCBCR_LIMITED_RANGE),
+ BIT(DRM_TF_UNDEFINED),
DRM_COLOR_YCBCR_BT601,
- DRM_COLOR_YCBCR_LIMITED_RANGE);
+ DRM_COLOR_YCBCR_LIMITED_RANGE,
+ DRM_TF_UNDEFINED);
plane->set_params = nv10_set_params;
nv10_set_params(plane);
diff --git a/drivers/gpu/drm/omapdrm/omap_plane.c b/drivers/gpu/drm/omapdrm/omap_plane.c
index 801da917507d..ca7559824dcd 100644
--- a/drivers/gpu/drm/omapdrm/omap_plane.c
+++ b/drivers/gpu/drm/omapdrm/omap_plane.c
@@ -325,8 +325,10 @@ struct drm_plane *omap_plane_init(struct drm_device *dev,
BIT(DRM_COLOR_YCBCR_BT709),
BIT(DRM_COLOR_YCBCR_FULL_RANGE) |
BIT(DRM_COLOR_YCBCR_LIMITED_RANGE),
+ BIT(DRM_TF_UNDEFINED),
DRM_COLOR_YCBCR_BT601,
- DRM_COLOR_YCBCR_FULL_RANGE);
+ DRM_COLOR_YCBCR_FULL_RANGE,
+ DRM_TF_UNDEFINED);
return plane;
diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
index 1c86c2dd0bbf..eda8f51bafd7 100644
--- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
+++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
@@ -600,8 +600,10 @@ struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm,
ret = drm_plane_create_color_properties(&layer->plane,
supported_encodings,
supported_ranges,
+ BIT(DRM_TF_UNDEFINED),
DRM_COLOR_YCBCR_BT709,
- DRM_COLOR_YCBCR_LIMITED_RANGE);
+ DRM_COLOR_YCBCR_LIMITED_RANGE,
+ DRM_TF_UNDEFINED);
if (ret) {
dev_err(drm->dev, "Couldn't add encoding and range properties!\n");
return ERR_PTR(ret);
diff --git a/drivers/gpu/drm/tidss/tidss_plane.c b/drivers/gpu/drm/tidss/tidss_plane.c
index 1acd15aa4193..a1336ecd5fd5 100644
--- a/drivers/gpu/drm/tidss/tidss_plane.c
+++ b/drivers/gpu/drm/tidss/tidss_plane.c
@@ -186,8 +186,10 @@ struct tidss_plane *tidss_plane_create(struct tidss_device *tidss,
BIT(DRM_COLOR_YCBCR_BT709));
u32 color_ranges = (BIT(DRM_COLOR_YCBCR_FULL_RANGE) |
BIT(DRM_COLOR_YCBCR_LIMITED_RANGE));
+ u32 transfer_functions = BIT(DRM_TF_UNDEFINED;
u32 default_encoding = DRM_COLOR_YCBCR_BT601;
u32 default_range = DRM_COLOR_YCBCR_FULL_RANGE;
+ u32 default_tf = DRM_TF_UNDEFINED;;
u32 blend_modes = (BIT(DRM_MODE_BLEND_PREMULTI) |
BIT(DRM_MODE_BLEND_COVERAGE));
int ret;
@@ -217,8 +219,10 @@ struct tidss_plane *tidss_plane_create(struct tidss_device *tidss,
ret = drm_plane_create_color_properties(&tplane->plane,
color_encodings,
color_ranges,
+ transfer_functions,
default_encoding,
- default_range);
+ default_range,
+ default_tf);
if (ret)
goto err;
diff --git a/include/drm/drm_color_mgmt.h b/include/drm/drm_color_mgmt.h
index 81c298488b0c..370bbc55b744 100644
--- a/include/drm/drm_color_mgmt.h
+++ b/include/drm/drm_color_mgmt.h
@@ -87,11 +87,27 @@ enum drm_color_range {
DRM_COLOR_RANGE_MAX,
};
+/**
+ * enum drm_transfer_function - common transfer function used for sdr/hdr formats
+ *
+ * DRM_TF_UNDEFINED - The legacy case where a TF in and out of the blending
+ * space is undefined
+ * DRM_TF_SRGB - Based on gamma curve and is used for printer/monitors/web
+ * DRM_TF_PQ2084 - Used for HDR and allows for up to 10,000 nit support.
+*/
+enum drm_transfer_function {
+ DRM_TF_UNDEFINED,
+ DRM_TF_SRGB,
+ DRM_TF_PQ2084,
+ DRM_TF_MAX,
+};
int drm_plane_create_color_properties(struct drm_plane *plane,
u32 supported_encodings,
u32 supported_ranges,
+ u32 supported_tf,
enum drm_color_encoding default_encoding,
- enum drm_color_range default_range);
+ enum drm_color_range default_range,
+ enum drm_transfer_function default_tf);
/**
* enum drm_color_lut_tests - hw-specific LUT tests to perform
diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h
index 1294610e84f4..cff56994513f 100644
--- a/include/drm/drm_plane.h
+++ b/include/drm/drm_plane.h
@@ -179,6 +179,14 @@ struct drm_plane_state {
*/
enum drm_color_range color_range;
+ /**
+ * @transfer_function:
+ *
+ * Transfer function for HDR color/luminance mapping. This will allow the
+ * driver to know what transfer function should be used to for the current
+ * format for a proper HDR color/luminance output.
+ */
+ enum drm_transfer_function transfer_function;
/**
* @fb_damage_clips:
*
@@ -741,6 +749,14 @@ struct drm_plane {
* See drm_plane_create_color_properties().
*/
struct drm_property *color_range_property;
+ /**
+ * @transfer_function_property:
+ *
+ * Optional "TRANSFER_FUNCTION" enum property for specifying
+ * color transfer function for non RGB formats, mostly used for HDR.
+ * See drm_plane_create_color_properties().
+ */
+ struct drm_property *transfer_function_property;
/**
* @scaling_filter_property: property to apply a particular filter while
--
2.32.0
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