[PATCH 2/5] drm/amd/pm: correct the runpm handling for BACO supported ASIC

Evan Quan evan.quan at amd.com
Thu Jun 3 04:56:00 UTC 2021


Via the fSMC_MSG_ArmD3 message, PMFW can properly act on the
Dstate change. Driver involvement for determining the timing for
BACO enter/exit is not needed.

Change-Id: Id9ab5e308ff1873888d0acd822c71b0a303fbb01
Signed-off-by: Evan Quan <evan.quan at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c       |  2 ++
 .../gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c    | 20 ++++++++++---------
 2 files changed, 13 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 3de1accb060e..3fad67c32098 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -1574,6 +1574,8 @@ static int amdgpu_pmops_runtime_resume(struct device *dev)
 		 */
 		pci_set_master(pdev);
 	} else if (amdgpu_device_supports_baco(drm_dev)) {
+		/* Wait for PMFW handling for the Dstate change */
+		msleep(10);
 		amdgpu_device_baco_exit(drm_dev);
 	}
 	ret = amdgpu_device_resume(drm_dev, false);
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
index 362696208fd8..61d00b989e49 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
@@ -1581,25 +1581,27 @@ int smu_v11_0_baco_enter(struct smu_context *smu)
 	struct amdgpu_device *adev = smu->adev;
 	int ret = 0;
 
-	/* Arcturus does not need this audio workaround */
-	if (adev->asic_type != CHIP_ARCTURUS) {
+	if (adev->in_runpm) {
 		ret = smu_v11_0_baco_set_armd3_sequence(smu, BACO_SEQ_BACO);
+	} else {
+		ret = smu_v11_0_baco_set_state(smu, SMU_BACO_STATE_ENTER);
 		if (ret)
 			return ret;
-	}
-
-	ret = smu_v11_0_baco_set_state(smu, SMU_BACO_STATE_ENTER);
-	if (ret)
-		return ret;
 
-	msleep(10);
+		msleep(10);
+	}
 
 	return ret;
 }
 
 int smu_v11_0_baco_exit(struct smu_context *smu)
 {
-	return smu_v11_0_baco_set_state(smu, SMU_BACO_STATE_EXIT);
+	struct amdgpu_device *adev = smu->adev;
+
+	if (adev->in_runpm)
+		return smu_v11_0_baco_set_armd3_sequence(smu, BACO_SEQ_ULPS);
+	else
+		return smu_v11_0_baco_set_state(smu, SMU_BACO_STATE_EXIT);
 }
 
 int smu_v11_0_mode1_reset(struct smu_context *smu)
-- 
2.29.0



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