[PATCH] drm/amd/display: add dummy PG callback for beige goby
Alex Deucher
alexdeucher at gmail.com
Fri Jun 11 16:55:32 UTC 2021
On Fri, Jun 11, 2021 at 11:48 AM Aurabindo Pillai
<aurabindo.pillai at amd.com> wrote:
>
> [Why&How]
> PG registers are absent in beige goby, so programming these registers
> generate call trace. Fix this by adding a dummy function in dcn303
> initialization function which prevents writing to non existant registers.
>
> Fixes: 54f910c6372e ("drm/amd/display: Initial DC support for Beige Goby")
> Signed-off-by: Aurabindo Pillai <aurabindo.pillai at amd.com>
Acked-by: Alex Deucher <alexander.deucher at amd.com>
> ---
> drivers/gpu/drm/amd/display/dc/dcn303/dcn303_hwseq.c | 5 +++++
> drivers/gpu/drm/amd/display/dc/dcn303/dcn303_hwseq.h | 1 +
> drivers/gpu/drm/amd/display/dc/dcn303/dcn303_init.c | 1 +
> 3 files changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn303/dcn303_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn303/dcn303_hwseq.c
> index dc33ec8b7bdb..b48b732aa647 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn303/dcn303_hwseq.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn303/dcn303_hwseq.c
> @@ -38,3 +38,8 @@ void dcn303_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool po
> {
> /*DCN303 removes PG registers*/
> }
> +
> +void dcn303_enable_power_gating_plane(struct dce_hwseq *hws, bool enable)
> +{
> + /*DCN303 removes PG registers*/
> +}
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn303/dcn303_hwseq.h b/drivers/gpu/drm/amd/display/dc/dcn303/dcn303_hwseq.h
> index fc6cab720b6d..8b69a3b76c11 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn303/dcn303_hwseq.h
> +++ b/drivers/gpu/drm/amd/display/dc/dcn303/dcn303_hwseq.h
> @@ -13,5 +13,6 @@
> void dcn303_dpp_pg_control(struct dce_hwseq *hws, unsigned int dpp_inst, bool power_on);
> void dcn303_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool power_on);
> void dcn303_dsc_pg_control(struct dce_hwseq *hws, unsigned int dsc_inst, bool power_on);
> +void dcn303_enable_power_gating_plane(struct dce_hwseq *hws, bool enable);
>
> #endif /* __DC_HWSS_DCN303_H__ */
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn303/dcn303_init.c b/drivers/gpu/drm/amd/display/dc/dcn303/dcn303_init.c
> index 86d4b303d02f..aa5dbbade2bd 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn303/dcn303_init.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn303/dcn303_init.c
> @@ -16,4 +16,5 @@ void dcn303_hw_sequencer_construct(struct dc *dc)
> dc->hwseq->funcs.dpp_pg_control = dcn303_dpp_pg_control;
> dc->hwseq->funcs.hubp_pg_control = dcn303_hubp_pg_control;
> dc->hwseq->funcs.dsc_pg_control = dcn303_dsc_pg_control;
> + dc->hwseq->funcs.enable_power_gating_plane = dcn303_enable_power_gating_plane;
> }
> --
> 2.32.0
>
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