[PATCH 2/2] drm/amd/display: fix null pointer access in gpu reset

[Quan, Evan]

[AMD Official Use Only]

Series is reviewed-and-tested-by: Evan Quan <evan.quan at amd.com>

> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of
> Guchun Chen
> Sent: Monday, June 28, 2021 5:28 PM
> To: amd-gfx at lists.freedesktop.org; Siqueira, Rodrigo
> <Rodrigo.Siqueira at amd.com>; Pillai, Aurabindo
> <Aurabindo.Pillai at amd.com>; Wentland, Harry
> <Harry.Wentland at amd.com>; Yin, Tianci (Rico) <Tianci.Yin at amd.com>;
> Deucher, Alexander <Alexander.Deucher at amd.com>
> Cc: Chen, Guchun <Guchun.Chen at amd.com>
> Subject: [PATCH 2/2] drm/amd/display: fix null pointer access in gpu reset
> 
> During GPU reset, when receiving a DMCUB OUTBUX0 interrupt, DAL code
> will set it to be OUTBOX interrupt and sets hw interrupt.
> However, OUTBOX interrupt is not registered yet, so a NULL pointer access
> will be executed.
> 
> Call Trace:
>   dal_irq_service_set+0x30/0x90 [amdgpu]
>   dc_interrupt_set+0x24/0x30 [amdgpu]
>   amdgpu_dm_set_dmub_outbox_irq_state+0x22/0x30 [amdgpu]
>   amdgpu_irq_update+0x77/0xa0 [amdgpu]
>   amdgpu_irq_gpu_reset_resume_helper+0x67/0xa0 [amdgpu]
>   amdgpu_do_asic_reset+0x219/0x260 [amdgpu]
>   amdgpu_device_gpu_recover.cold+0x8c5/0xb64 [amdgpu]
>   amdgpu_debugfs_gpu_recover_show+0x2c/0x60 [amdgpu]
>   seq_read_iter+0xc2/0x450
>   ? do_anonymous_page+0x22c/0x3b0
>   seq_read+0xf9/0x140
>   full_proxy_read+0x5c/0x90
>   vfs_read+0xaa/0x190
>   ksys_read+0x67/0xe0
>   __x64_sys_read+0x1a/0x20
> 
> Fixes: 85465bd6dc6e drm/amdgpu/display: remove an old DCN3 guard
> 
> Signed-off-by: Guchun Chen <guchun.chen at amd.com>
> ---
>  drivers/gpu/drm/amd/display/dc/irq/irq_service.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/dc/irq/irq_service.c
> b/drivers/gpu/drm/amd/display/dc/irq/irq_service.c
> index 5f245bde54ff..a2a4fbeb83f8 100644
> --- a/drivers/gpu/drm/amd/display/dc/irq/irq_service.c
> +++ b/drivers/gpu/drm/amd/display/dc/irq/irq_service.c
> @@ -119,7 +119,7 @@ bool dal_irq_service_set(
> 
>  	dal_irq_service_ack(irq_service, source);
> 
> -	if (info->funcs->set)
> +	if (info->funcs && info->funcs->set)
>  		return info->funcs->set(irq_service, info, enable);
> 
>  	dal_irq_service_set_generic(irq_service, info, enable); @@ -153,7
> +153,7 @@ bool dal_irq_service_ack(
>  		return false;
>  	}
> 
> -	if (info->funcs->ack)
> +	if (info->funcs && info->funcs->ack)
>  		return info->funcs->ack(irq_service, info);
> 
>  	dal_irq_service_ack_generic(irq_service, info);
> --
> 2.17.1
> 
> _______________________________________________
> amd-gfx mailing list
> amd-gfx at lists.freedesktop.org
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.
> freedesktop.org%2Fmailman%2Flistinfo%2Famd-
> gfx&data=04%7C01%7Cevan.quan%40amd.com%7C338ed5d1487e4834
> 76e908d93a1706a7%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C6
> 37604692835538651%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMD
> AiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=
> GTl5TKifsVpzCiccc%2BXmqnooa1grUmGjyPmMTCN1zmI%3D&reserved
> =0