[PATCH] drm/amdgpu: Set ttm caching flags during bo allocation

Xu, Feifei Feifei.Xu at amd.com
Tue Jun 29 09:26:30 UTC 2021

[AMD Official Use Only]

Reviewed-by: Feifei Xu <Feifei.Xu at amd.com>

-----Original Message-----
From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of Oak Zeng
Sent: Tuesday, June 29, 2021 7:16 AM
To: amd-gfx at lists.freedesktop.org
Cc: Kuehling, Felix <Felix.Kuehling at amd.com>; Zhu, James <James.Zhu at amd.com>; Koenig, Christian <Christian.Koenig at amd.com>; Zeng, Oak <Oak.Zeng at amd.com>
Subject: [PATCH] drm/amdgpu: Set ttm caching flags during bo allocation

The ttm caching flags (ttm_cached, ttm_write_combined etc) are used to determine a buffer object's mapping attributes in both CPU page table and GPU page table (when that buffer is also accessed by GPU). Currently the ttm caching flags are set in function amdgpu_ttm_io_mem_reserve which is called during DRM_AMDGPU_GEM_MMAP ioctl. This has a problem since the GPU mapping of the buffer object (ioctl DRM_AMDGPU_GEM_VA) can happen earlier than the mmap time, thus the GPU page table update code can't pick up the right ttm caching flags to decide the right GPU page table attributes.

This patch moves the ttm caching flags setting to function amdgpu_vram_mgr_new - this function is called during the first step of a buffer object create (eg, DRM_AMDGPU_GEM_CREATE) so the later both CPU and GPU mapping function calls will pick up this flag for CPU/GPU page table set up.

Signed-off-by: Oak Zeng <Oak.Zeng at amd.com>
Suggested-by: Christian Koenig <Christian.Koenig at amd.com>
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c      | 4 ----
 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 5 +++++
 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 6297363..93acf6f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -607,10 +607,6 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_device *bdev,

                mem->bus.offset += adev->gmc.aper_base;
                mem->bus.is_iomem = true;
-               if (adev->gmc.xgmi.connected_to_cpu)
-                       mem->bus.caching = ttm_cached;
-               else
-                       mem->bus.caching = ttm_write_combined;
                return -EINVAL;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
index a52e17e..6cb66eb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
@@ -454,6 +454,11 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man,
        if (i == 1)
                mem->placement |= TTM_PL_FLAG_CONTIGUOUS;

+       if (adev->gmc.xgmi.connected_to_cpu)
+               mem->bus.caching = ttm_cached;
+       else
+               mem->bus.caching = ttm_write_combined;
        atomic64_add(vis_usage, &mgr->vis_usage);
        mem->mm_node = nodes;
        return 0;

amd-gfx mailing list
amd-gfx at lists.freedesktop.org

More information about the amd-gfx mailing list