[PATCH v2] drm/amd/pm/swsmu: clean up user profile function
Quan, Evan
Evan.Quan at amd.com
Thu Mar 4 00:49:23 UTC 2021
[AMD Public Use]
Reviewed-by: Evan Quan <evan.quan at amd.com>
-----Original Message-----
From: Paneer Selvam, Arunpravin <Arunpravin.PaneerSelvam at amd.com>
Sent: Wednesday, March 3, 2021 10:09 PM
To: amd-gfx at lists.freedesktop.org
Cc: Deucher, Alexander <Alexander.Deucher at amd.com>; Lazar, Lijo <Lijo.Lazar at amd.com>; Quan, Evan <Evan.Quan at amd.com>; Paneer Selvam, Arunpravin <Arunpravin.PaneerSelvam at amd.com>
Subject: [PATCH v2] drm/amd/pm/swsmu: clean up user profile function
Remove unnecessary comments, enable restore mode using '|=' operator, fixes the alignment to improve the code readability.
v2: Move all restoration flag check to bitwise '&' operator
Signed-off-by: Arunpravin <Arunpravin.PaneerSelvam at amd.com>
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 34 ++++++++---------------
1 file changed, 12 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index f5d9590f2178..a64228157ff6 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -315,35 +315,25 @@ static void smu_set_user_clk_dependencies(struct smu_context *smu, enum smu_clk_
if (smu->adev->in_suspend)
return;
- /*
- * mclk, fclk and socclk are interdependent
- * on each other
- */
if (clk == SMU_MCLK) {
- /* reset clock dependency */
smu->user_dpm_profile.clk_dependency = 0;
- /* set mclk dependent clocks(fclk and socclk) */
smu->user_dpm_profile.clk_dependency = BIT(SMU_FCLK) | BIT(SMU_SOCCLK);
} else if (clk == SMU_FCLK) {
- /* give priority to mclk, if mclk dependent clocks are set */
+ /* MCLK takes precedence over FCLK */
if (smu->user_dpm_profile.clk_dependency == (BIT(SMU_FCLK) | BIT(SMU_SOCCLK)))
return;
- /* reset clock dependency */
smu->user_dpm_profile.clk_dependency = 0;
- /* set fclk dependent clocks(mclk and socclk) */
smu->user_dpm_profile.clk_dependency = BIT(SMU_MCLK) | BIT(SMU_SOCCLK);
} else if (clk == SMU_SOCCLK) {
- /* give priority to mclk, if mclk dependent clocks are set */
+ /* MCLK takes precedence over SOCCLK */
if (smu->user_dpm_profile.clk_dependency == (BIT(SMU_FCLK) | BIT(SMU_SOCCLK)))
return;
- /* reset clock dependency */
smu->user_dpm_profile.clk_dependency = 0;
- /* set socclk dependent clocks(mclk and fclk) */
smu->user_dpm_profile.clk_dependency = BIT(SMU_MCLK) | BIT(SMU_FCLK);
} else
- /* add clk dependencies here, if any */
+ /* Add clk dependencies here, if any */
return;
}
@@ -367,7 +357,7 @@ static void smu_restore_dpm_user_profile(struct smu_context *smu)
return;
/* Enable restore flag */
- smu->user_dpm_profile.flags = SMU_DPM_USER_PROFILE_RESTORE;
+ smu->user_dpm_profile.flags |= SMU_DPM_USER_PROFILE_RESTORE;
/* set the user dpm power limit */
if (smu->user_dpm_profile.power_limit) { @@ -390,8 +380,8 @@ static void smu_restore_dpm_user_profile(struct smu_context *smu)
ret = smu_force_smuclk_levels(smu, clk_type,
smu->user_dpm_profile.clk_mask[clk_type]);
if (ret)
- dev_err(smu->adev->dev, "Failed to set clock type = %d\n",
- clk_type);
+ dev_err(smu->adev->dev,
+ "Failed to set clock type = %d\n", clk_type);
}
}
}
@@ -1844,7 +1834,7 @@ static int smu_force_smuclk_levels(struct smu_context *smu,
if (smu->ppt_funcs && smu->ppt_funcs->force_clk_levels) {
ret = smu->ppt_funcs->force_clk_levels(smu, clk_type, mask);
- if (!ret && smu->user_dpm_profile.flags != SMU_DPM_USER_PROFILE_RESTORE) {
+ if (!ret && !(smu->user_dpm_profile.flags &
+SMU_DPM_USER_PROFILE_RESTORE)) {
smu->user_dpm_profile.clk_mask[clk_type] = mask;
smu_set_user_clk_dependencies(smu, clk_type);
}
@@ -2141,7 +2131,7 @@ int smu_set_fan_speed_rpm(void *handle, uint32_t speed)
if (smu->ppt_funcs->set_fan_speed_percent) {
percent = speed * 100 / smu->fan_max_rpm;
ret = smu->ppt_funcs->set_fan_speed_percent(smu, percent);
- if (!ret && smu->user_dpm_profile.flags != SMU_DPM_USER_PROFILE_RESTORE)
+ if (!ret && !(smu->user_dpm_profile.flags &
+SMU_DPM_USER_PROFILE_RESTORE))
smu->user_dpm_profile.fan_speed_percent = percent;
}
@@ -2212,7 +2202,7 @@ int smu_set_power_limit(void *handle, uint32_t limit)
if (smu->ppt_funcs->set_power_limit) {
ret = smu->ppt_funcs->set_power_limit(smu, limit);
- if (!ret && smu->user_dpm_profile.flags != SMU_DPM_USER_PROFILE_RESTORE)
+ if (!ret && !(smu->user_dpm_profile.flags &
+SMU_DPM_USER_PROFILE_RESTORE))
smu->user_dpm_profile.power_limit = limit;
}
@@ -2433,7 +2423,7 @@ int smu_set_fan_control_mode(struct smu_context *smu, int value)
if (smu->ppt_funcs->set_fan_control_mode) {
ret = smu->ppt_funcs->set_fan_control_mode(smu, value);
- if (!ret && smu->user_dpm_profile.flags != SMU_DPM_USER_PROFILE_RESTORE)
+ if (!ret && !(smu->user_dpm_profile.flags &
+SMU_DPM_USER_PROFILE_RESTORE))
smu->user_dpm_profile.fan_mode = value;
}
@@ -2441,7 +2431,7 @@ int smu_set_fan_control_mode(struct smu_context *smu, int value)
/* reset user dpm fan speed */
if (!ret && value != AMD_FAN_CTRL_MANUAL &&
- smu->user_dpm_profile.flags != SMU_DPM_USER_PROFILE_RESTORE)
+ !(smu->user_dpm_profile.flags & SMU_DPM_USER_PROFILE_RESTORE))
smu->user_dpm_profile.fan_speed_percent = 0;
return ret;
@@ -2492,7 +2482,7 @@ int smu_set_fan_speed_percent(void *handle, u32 speed)
if (speed > 100)
speed = 100;
ret = smu->ppt_funcs->set_fan_speed_percent(smu, speed);
- if (!ret && smu->user_dpm_profile.flags != SMU_DPM_USER_PROFILE_RESTORE)
+ if (!ret && !(smu->user_dpm_profile.flags &
+SMU_DPM_USER_PROFILE_RESTORE))
smu->user_dpm_profile.fan_speed_percent = speed;
}
--
2.17.1
More information about the amd-gfx
mailing list