[PATCH] drm/amdgpu: soc15 pcie gen4 support

[Feifei Xu]

Signed-off-by: Feifei Xu <Feifei.Xu at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/soc15.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 28b991904eaa..437cdc56bdc5 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -569,7 +569,7 @@ static int soc15_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk
 	return 0;
 }
 
-static void soc15_pcie_gen3_enable(struct amdgpu_device *adev)
+static void soc15_pcie_gen4_enable(struct amdgpu_device *adev)
 {
 	if (pci_is_root_bus(adev->pdev->bus))
 		return;
@@ -581,7 +581,8 @@ static void soc15_pcie_gen3_enable(struct amdgpu_device *adev)
 		return;
 
 	if (!(adev->pm.pcie_gen_mask & (CAIL_PCIE_LINK_SPEED_SUPPORT_GEN2 |
-					CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3)))
+					CAIL_PCIE_LINK_SPEED_SUPPORT_GEN3 |
+					CAIL_PCIE_LINK_SPEED_SUPPORT_GEN4)))
 		return;
 
 	/* todo */
@@ -1374,8 +1375,8 @@ static int soc15_common_hw_init(void *handle)
 {
 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
-	/* enable pcie gen2/3 link */
-	soc15_pcie_gen3_enable(adev);
+	/* enable pcie gen2/3/4 link */
+	soc15_pcie_gen4_enable(adev);
 	/* enable aspm */
 	soc15_program_aspm(adev);
 	/* setup nbio registers */
-- 
2.25.1