[PATCH] drm/amdgpu: add DMUB trace event IRQ source define

Harry Wentland harry.wentland at amd.com
Thu Mar 4 22:45:55 UTC 2021


On 2021-03-04 2:43 p.m., Leo (Hanghong) Ma wrote:
> [Why & How]
> We use DMCUB outbox0 interrupt to log DMCUB trace buffer events
> as Linux kernel traces, so need to add some irq source related
> defination in the header files;
> 
> Signed-off-by: Leo (Hanghong) Ma <hanghong.ma at amd.com>

Reviewed-by: Harry Wentland <harry.wentland at amd.com>

Harry

> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu.h                       | 1 +
>   drivers/gpu/drm/amd/include/ivsrcid/dcn/irqsrcs_dcn_1_0.h | 2 ++
>   2 files changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 1624c2bc8285..f01b75ec6c60 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -912,6 +912,7 @@ struct amdgpu_device {
>   	struct amdgpu_irq_src		vupdate_irq;
>   	struct amdgpu_irq_src		pageflip_irq;
>   	struct amdgpu_irq_src		hpd_irq;
> +	struct amdgpu_irq_src		dmub_trace_irq;
>   
>   	/* rings */
>   	u64				fence_context;
> diff --git a/drivers/gpu/drm/amd/include/ivsrcid/dcn/irqsrcs_dcn_1_0.h b/drivers/gpu/drm/amd/include/ivsrcid/dcn/irqsrcs_dcn_1_0.h
> index ac9fa3a9bd07..e2bffcae273a 100644
> --- a/drivers/gpu/drm/amd/include/ivsrcid/dcn/irqsrcs_dcn_1_0.h
> +++ b/drivers/gpu/drm/amd/include/ivsrcid/dcn/irqsrcs_dcn_1_0.h
> @@ -1130,5 +1130,7 @@
>   #define DCN_1_0__SRCID__HUBP6_FLIP_AWAY_INTERRUPT	0x63	// Flip_away interrupt is generated when all data for old surface is returned and old surface is not used again after the surface flip.HUBP6_IHC_FLIP_AWAY_INTERRUPT	DISP_INTERRUPT_STATUS_CONTINUE17	Level / Pulse
>   #define DCN_1_0__SRCID__HUBP7_FLIP_AWAY_INTERRUPT	0x64	// Flip_away interrupt is generated when all data for old surface is returned and old surface is not used again after the surface flip.HUBP7_IHC_FLIP_AWAY_INTERRUPT	DISP_INTERRUPT_STATUS_CONTINUE17	Level / Pulse
>   
> +#define DCN_1_0__SRCID__DMCUB_OUTBOX_HIGH_PRIORITY_READY_INT       0x68
> +#define DCN_1_0__CTXID__DMCUB_OUTBOX_HIGH_PRIORITY_READY_INT       6
>   
>   #endif // __IRQSRCS_DCN_1_0_H__
> 


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