[PATCH 27/30] drm/dp_mst: Pass drm_dp_mst_topology_mgr to drm_dp_get_vc_payload_bw()
Robert Foss
robert.foss at linaro.org
Fri Mar 19 11:35:24 UTC 2021
Hey Lyude,
Thanks for the patch.
On Fri, 19 Feb 2021 at 23:03, Lyude Paul <lyude at redhat.com> wrote:
>
> Since this is one of the few functions in drm_dp_mst_topology.c that
> doesn't have any way of getting access to a drm_device, let's pass the
> drm_dp_mst_topology_mgr down to this function so that it can use
> drm_dbg_kms().
>
> Signed-off-by: Lyude Paul <lyude at redhat.com>
> ---
> drivers/gpu/drm/drm_dp_mst_topology.c | 7 +++++--
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 3 ++-
> include/drm/drm_dp_mst_helper.h | 3 ++-
> 3 files changed, 9 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c
> index cf4f2f85711e..fb66df39e0bb 100644
> --- a/drivers/gpu/drm/drm_dp_mst_topology.c
> +++ b/drivers/gpu/drm/drm_dp_mst_topology.c
> @@ -3631,6 +3631,7 @@ static int drm_dp_send_up_ack_reply(struct drm_dp_mst_topology_mgr *mgr,
>
> /**
> * drm_dp_get_vc_payload_bw - get the VC payload BW for an MST link
> + * @mgr: The &drm_dp_mst_topology_mgr to use
> * @link_rate: link rate in 10kbits/s units
> * @link_lane_count: lane count
> *
> @@ -3639,7 +3640,8 @@ static int drm_dp_send_up_ack_reply(struct drm_dp_mst_topology_mgr *mgr,
> * convert the number of PBNs required for a given stream to the number of
> * timeslots this stream requires in each MTP.
> */
> -int drm_dp_get_vc_payload_bw(int link_rate, int link_lane_count)
> +int drm_dp_get_vc_payload_bw(const struct drm_dp_mst_topology_mgr *mgr,
> + int link_rate, int link_lane_count)
> {
> if (link_rate == 0 || link_lane_count == 0)
> DRM_DEBUG_KMS("invalid link rate/lane count: (%d / %d)\n",
> @@ -3704,7 +3706,8 @@ int drm_dp_mst_topology_mgr_set_mst(struct drm_dp_mst_topology_mgr *mgr, bool ms
> goto out_unlock;
> }
>
> - mgr->pbn_div = drm_dp_get_vc_payload_bw(drm_dp_bw_code_to_link_rate(mgr->dpcd[1]),
> + mgr->pbn_div = drm_dp_get_vc_payload_bw(mgr,
> + drm_dp_bw_code_to_link_rate(mgr->dpcd[1]),
> mgr->dpcd[2] & DP_MAX_LANE_COUNT_MASK);
> if (mgr->pbn_div == 0) {
> ret = -EINVAL;
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 8e316146b6d1..60ca0fa32d15 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -70,7 +70,8 @@ static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
> slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr,
> connector->port,
> crtc_state->pbn,
> - drm_dp_get_vc_payload_bw(crtc_state->port_clock,
> + drm_dp_get_vc_payload_bw(&intel_dp->mst_mgr,
> + crtc_state->port_clock,
> crtc_state->lane_count));
checkpatch --strict is unhappy about this chunk
WARNING: line length of 102 exceeds 100 columns
#61: FILE: drivers/gpu/drm/i915/display/intel_dp_mst.c:73:
+ crtc_state->port_clock,
Maybe the results of drm_dp_get_vc_payload_bw() can be but in a
temporary variable.
> if (slots == -EDEADLK)
> return slots;
> diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_mst_helper.h
> index bd1c39907b92..20dc705642bd 100644
> --- a/include/drm/drm_dp_mst_helper.h
> +++ b/include/drm/drm_dp_mst_helper.h
> @@ -783,7 +783,8 @@ drm_dp_mst_detect_port(struct drm_connector *connector,
>
> struct edid *drm_dp_mst_get_edid(struct drm_connector *connector, struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port);
>
> -int drm_dp_get_vc_payload_bw(int link_rate, int link_lane_count);
> +int drm_dp_get_vc_payload_bw(const struct drm_dp_mst_topology_mgr *mgr,
> + int link_rate, int link_lane_count);
>
> int drm_dp_calc_pbn_mode(int clock, int bpp, bool dsc);
>
> --
> 2.29.2
>
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