[PATCH] drm/amdgpu/display: properly guard dc_dsc_stream_bandwidth_in_kbps

[Harry Wentland]

On 2021-03-19 2:18 p.m., Alex Deucher wrote:
> Ping?
> 
> On Thu, Mar 18, 2021 at 10:18 PM Alex Deucher <alexander.deucher at amd.com> wrote:
>>
>> Move the function protoype to the right header and guard
>> the call with CONFIG_DRM_AMD_DC_DCN as DSC is only available
>> with DCN.
>>
>> Fixes: a03f6c0e26b2 ("drm/amd/display: Add changes for dsc bpp in 16ths and unify bw calculations")
>> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
>> Cc: Dillon Varone <dillon.varone at amd.com>
>> Cc: Stephen Rothwell <sfr at canb.auug.org.au>

Reviewed-by: Harry Wentland <harry.wentland at amd.com>

Harry

>> ---
>>   drivers/gpu/drm/amd/display/dc/core/dc_link.c | 4 ++--
>>   drivers/gpu/drm/amd/display/dc/dc_dsc.h       | 2 ++
>>   2 files changed, 4 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
>> index 10e34e411e06..f9a33dc52c45 100644
>> --- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
>> +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
>> @@ -3498,17 +3498,17 @@ void dc_link_enable_hpd_filter(struct dc_link *link, bool enable)
>>          }
>>   }
>>
>> -uint32_t dc_dsc_stream_bandwidth_in_kbps(uint32_t pix_clk_100hz, uint32_t bpp_x16);
>> -
>>   uint32_t dc_bandwidth_in_kbps_from_timing(
>>          const struct dc_crtc_timing *timing)
>>   {
>>          uint32_t bits_per_channel = 0;
>>          uint32_t kbps;
>>
>> +#if defined(CONFIG_DRM_AMD_DC_DCN)
>>          if (timing->flags.DSC) {
>>                  return dc_dsc_stream_bandwidth_in_kbps(timing->pix_clk_100hz, timing->dsc_cfg.bits_per_pixel);
>>          }
>> +#endif
>>
>>          switch (timing->display_color_depth) {
>>          case COLOR_DEPTH_666:
>> diff --git a/drivers/gpu/drm/amd/display/dc/dc_dsc.h b/drivers/gpu/drm/amd/display/dc/dc_dsc.h
>> index 0c5d98524536..c51d2d961b7a 100644
>> --- a/drivers/gpu/drm/amd/display/dc/dc_dsc.h
>> +++ b/drivers/gpu/drm/amd/display/dc/dc_dsc.h
>> @@ -88,4 +88,6 @@ void dc_dsc_policy_set_max_target_bpp_limit(uint32_t limit);
>>
>>   void dc_dsc_policy_set_enable_dsc_when_not_needed(bool enable);
>>
>> +uint32_t dc_dsc_stream_bandwidth_in_kbps(uint32_t pix_clk_100hz, uint32_t bpp_x16);
>> +
>>   #endif
>> --
>> 2.30.2
>>
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