[PATCH v2 2/8] drm/amd/pm: Add function to wait for smu events
Lazar, Lijo
Lijo.Lazar at amd.com
Mon Mar 22 05:57:22 UTC 2021
[AMD Public Use]
v1: Add function to wait for specific event/states from PMFW
v2: Add mutex lock, simplify sequence
Signed-off-by: Lijo Lazar lijo.lazar at amd.com<mailto:lijo.lazar at amd.com>
---
drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h | 15 ++++++++++++++-
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 15 +++++++++++++++
2 files changed, 29 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
index 2edb634bc1c6..5bd16d4fb00d 100644
--- a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
@@ -195,6 +195,11 @@ struct smu_user_dpm_profile {
uint32_t clk_dependency;
};
+enum smu_event_type {
+
+ SMU_EVENT_RESET_COMPLETE = 0,
+};
+
#define SMU_TABLE_INIT(tables, table_id, s, a, d) \
do { \
tables[table_id].size = s; \
@@ -338,7 +343,6 @@ struct smu_power_context {
struct smu_power_gate power_gate;
};
-
#define SMU_FEATURE_MAX (64)
struct smu_feature
{
@@ -1167,6 +1171,12 @@ struct pptable_funcs {
* @set_light_sbr: Set light sbr mode for the SMU.
*/
int (*set_light_sbr)(struct smu_context *smu, bool enable);
+
+ /**
+ * @wait_for_event: Wait for events from SMU.
+ */
+ int (*wait_for_event)(struct smu_context *smu,
+ enum smu_event_type event, uint64_t event_arg);
};
typedef enum {
@@ -1372,5 +1382,8 @@ int smu_gfx_state_change_set(struct smu_context *smu, uint32_t state);
int smu_set_light_sbr(struct smu_context *smu, bool enable);
+int smu_wait_for_event(struct amdgpu_device *adev, enum smu_event_type event,
+ uint64_t event_arg);
+
#endif
#endif
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
index 05f00900d10c..3d504038d101 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
@@ -3008,3 +3008,18 @@ static const struct amd_pm_funcs swsmu_pm_funcs = {
.force_clock_level = smu_force_ppclk_levels,
.print_clock_levels = smu_print_ppclk_levels,
};
+
+int smu_wait_for_event(struct amdgpu_device *adev, enum smu_event_type event,
+ uint64_t event_arg)
+{
+ int ret = -EINVAL;
+ struct smu_context *smu = &adev->smu;
+
+ if (smu->ppt_funcs->wait_for_event) {
+ mutex_lock(&smu->mutex);
+ ret = smu->ppt_funcs->wait_for_event(smu, event, event_arg);
+ mutex_unlock(&smu->mutex);
+ }
+
+ return ret;
+}
--
2.17.1
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