[PATCH] drm/amdgpu: Align serial size in drm_amdgpu_info_vbios
Gu, JiaWei (Will)
JiaWei.Gu at amd.com
Mon May 10 06:33:06 UTC 2021
[AMD Official Use Only - Internal Distribution Only]
With a second thought,
__u8 serial[16] in drm_amdgpu_info_vbios is a bit redundant, sysfs serial_number already exposes it.
Is it fine to abandon it from drm_amdgpu_info_vbios struct? @Alex Deucher @Nieto, David M
Best regards,
Jiawei
-----Original Message-----
From: Alex Deucher <alexdeucher at gmail.com>
Sent: Sunday, May 9, 2021 11:59 PM
To: Gu, JiaWei (Will) <JiaWei.Gu at amd.com>
Cc: amd-gfx list <amd-gfx at lists.freedesktop.org>; Kees Cook <keescook at chromium.org>
Subject: Re: [PATCH] drm/amdgpu: Align serial size in drm_amdgpu_info_vbios
On Sat, May 8, 2021 at 2:48 AM Jiawei Gu <Jiawei.Gu at amd.com> wrote:
>
> 20 should be serial char size now instead of 16.
>
> Signed-off-by: Jiawei Gu <Jiawei.Gu at amd.com>
Please make sure this keeps proper 64 bit alignment in the structure.
Alex
> ---
> include/uapi/drm/amdgpu_drm.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/uapi/drm/amdgpu_drm.h
> b/include/uapi/drm/amdgpu_drm.h index 2b487a8d2727..1c20721f90da
> 100644
> --- a/include/uapi/drm/amdgpu_drm.h
> +++ b/include/uapi/drm/amdgpu_drm.h
> @@ -957,7 +957,7 @@ struct drm_amdgpu_info_vbios {
> __u8 vbios_pn[64];
> __u32 version;
> __u8 date[32];
> - __u8 serial[16];
> + __u8 serial[20];
> __u32 dev_id;
> __u32 rev_id;
> __u32 sub_dev_id;
> --
> 2.17.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx at lists.freedesktop.org
> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flist
> s.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=04%7C01%7CJi
> awei.Gu%40amd.com%7Ccea31833184c41e8574508d9130360cc%7C3dd8961fe4884e6
> 08e11a82d994e183d%7C0%7C0%7C637561727523880356%7CUnknown%7CTWFpbGZsb3d
> 8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C
> 1000&sdata=kAJiC6WoJUTeExwk6ftrLfMoY2OTAwg9X7mGgJT3kLk%3D&rese
> rved=0
More information about the amd-gfx
mailing list