[PATCH v3] drm/amdgpu: flush TLB if valid PDE turns into PTE

Felix Kuehling felix.kuehling at amd.com
Thu May 13 17:19:31 UTC 2021


Am 2021-05-13 um 12:58 p.m. schrieb Philip Yang:
> Mapping huge page, 2MB aligned address with 2MB size, uses PDE0 as PTE.
> If previously valid PDE0, PDE0.V=1 and PDE0.P=0 turns into PTE, this
> requires TLB flush, otherwise page table walker will not read updated
> PDE0.
>
> Change page table update mapping to return table_freed flag to indicate
> the previously valid PDE may have turned into a PTE if page table is
> freed.
>
> Signed-off-by: Philip Yang <Philip.Yang at amd.com>

Reviewed-by: Felix Kuehling <Felix.Kuehling at amd.com>


> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 14 ++++++++++----
>  drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h |  7 ++++++-
>  drivers/gpu/drm/amd/amdkfd/kfd_svm.c   | 13 +++++++++++--
>  3 files changed, 27 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> index 3dcdcc9ff522..7e4c60a90eee 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> @@ -1583,6 +1583,7 @@ static int amdgpu_vm_update_ptes(struct amdgpu_vm_update_params *params,
>  			while (cursor.pfn < frag_start) {
>  				amdgpu_vm_free_pts(adev, params->vm, &cursor);
>  				amdgpu_vm_pt_next(adev, &cursor);
> +				params->table_freed = true;
>  			}
>  
>  		} else if (frag >= shift) {
> @@ -1610,6 +1611,7 @@ static int amdgpu_vm_update_ptes(struct amdgpu_vm_update_params *params,
>   * @nodes: array of drm_mm_nodes with the MC addresses
>   * @pages_addr: DMA addresses to use for mapping
>   * @fence: optional resulting fence
> + * @table_freed: return true if page table is freed
>   *
>   * Fill in the page table entries between @start and @last.
>   *
> @@ -1624,7 +1626,8 @@ int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
>  				uint64_t flags, uint64_t offset,
>  				struct drm_mm_node *nodes,
>  				dma_addr_t *pages_addr,
> -				struct dma_fence **fence)
> +				struct dma_fence **fence,
> +				bool *table_freed)
>  {
>  	struct amdgpu_vm_update_params params;
>  	enum amdgpu_sync_mode sync_mode;
> @@ -1736,6 +1739,9 @@ int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
>  
>  	r = vm->update_funcs->commit(&params, fence);
>  
> +	if (table_freed)
> +		*table_freed = params.table_freed;
> +
>  error_unlock:
>  	amdgpu_vm_eviction_unlock(vm);
>  	return r;
> @@ -1879,7 +1885,7 @@ int amdgpu_vm_bo_update(struct amdgpu_device *adev, struct amdgpu_bo_va *bo_va,
>  						resv, mapping->start,
>  						mapping->last, update_flags,
>  						mapping->offset, nodes,
> -						pages_addr, last_update);
> +						pages_addr, last_update, NULL);
>  		if (r)
>  			return r;
>  	}
> @@ -2090,7 +2096,7 @@ int amdgpu_vm_clear_freed(struct amdgpu_device *adev,
>  		r = amdgpu_vm_bo_update_mapping(adev, adev, vm, false, false,
>  						resv, mapping->start,
>  						mapping->last, init_pte_value,
> -						0, NULL, NULL, &f);
> +						0, NULL, NULL, &f, NULL);
>  		amdgpu_vm_free_mapping(adev, vm, mapping, f);
>  		if (r) {
>  			dma_fence_put(f);
> @@ -3428,7 +3434,7 @@ bool amdgpu_vm_handle_fault(struct amdgpu_device *adev, u32 pasid,
>  	}
>  
>  	r = amdgpu_vm_bo_update_mapping(adev, adev, vm, true, false, NULL, addr,
> -					addr, flags, value, NULL, NULL,
> +					addr, flags, value, NULL, NULL, NULL,
>  					NULL);
>  	if (r)
>  		goto error_unlock;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> index ea60ec122b51..e91288d637ce 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> @@ -231,6 +231,11 @@ struct amdgpu_vm_update_params {
>  	 * @num_dw_left: number of dw left for the IB
>  	 */
>  	unsigned int num_dw_left;
> +
> +	/**
> +	 * @table_freed: return true if page table is freed when updating
> +	 */
> +	bool table_freed;
>  };
>  
>  struct amdgpu_vm_update_funcs {
> @@ -404,7 +409,7 @@ int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev,
>  				uint64_t flags, uint64_t offset,
>  				struct drm_mm_node *nodes,
>  				dma_addr_t *pages_addr,
> -				struct dma_fence **fence);
> +				struct dma_fence **fence, bool *free_table);
>  int amdgpu_vm_bo_update(struct amdgpu_device *adev,
>  			struct amdgpu_bo_va *bo_va,
>  			bool clear);
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
> index b665e9ff77e3..a518ad26ceec 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c
> @@ -1084,7 +1084,7 @@ svm_range_unmap_from_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm,
>  
>  	return amdgpu_vm_bo_update_mapping(adev, adev, vm, false, true, NULL,
>  					   start, last, init_pte_value, 0,
> -					   NULL, NULL, fence);
> +					   NULL, NULL, fence, NULL);
>  }
>  
>  static int
> @@ -1137,6 +1137,7 @@ svm_range_map_to_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm,
>  		     struct amdgpu_device *bo_adev, struct dma_fence **fence)
>  {
>  	struct amdgpu_bo_va bo_va;
> +	bool table_freed = false;
>  	uint64_t pte_flags;
>  	int r = 0;
>  
> @@ -1159,7 +1160,8 @@ svm_range_map_to_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm,
>  					prange->mapping.offset,
>  					prange->ttm_res ?
>  						prange->ttm_res->mm_node : NULL,
> -					dma_addr, &vm->last_update);
> +					dma_addr, &vm->last_update,
> +					&table_freed);
>  	if (r) {
>  		pr_debug("failed %d to map to gpu 0x%lx\n", r, prange->start);
>  		goto out;
> @@ -1175,6 +1177,13 @@ svm_range_map_to_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm,
>  	if (fence)
>  		*fence = dma_fence_get(vm->last_update);
>  
> +	if (table_freed) {
> +		struct kfd_process *p;
> +
> +		p = container_of(prange->svms, struct kfd_process, svms);
> +		amdgpu_amdkfd_flush_gpu_tlb_pasid((struct kgd_dev *)adev,
> +						  p->pasid);
> +	}
>  out:
>  	prange->mapping.bo_va = NULL;
>  	return r;


More information about the amd-gfx mailing list