[PATCH 4/6] drm/amd/pm: Add sienna cichlid throttler translation
Graham Sider
Graham.Sider at amd.com
Thu May 20 14:29:28 UTC 2021
Perform dependent to independent throttle status translation for
sienna cichlid.
---
.../amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 48 ++++++++++++++++++-
1 file changed, 46 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
index 75acdb80c499..023b10306c3e 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
@@ -453,6 +453,49 @@ static int sienna_cichlid_tables_init(struct smu_context *smu)
return -ENOMEM;
}
+static uint32_t sienna_cichlid_get_indep_throttler_status(
+ unsigned long dep_throttler_status)
+{
+ unsigned long indep_throttler_status = 0;
+
+ __assign_bit(INDEP_THROTTLER_TEMP_EDGE_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_EDGE_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TEMP_HOTSPOT_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_HOTSPOT_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TEMP_MEM_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_MEM_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TEMP_VR_GFX_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_VR_GFX_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TEMP_VR_MEM_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_VR_MEM0_BIT, &dep_throttler_status) ||
+ test_bit(THROTTLER_TEMP_VR_MEM1_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TEMP_VR_SOC_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_VR_SOC_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TEMP_LIQUID_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TEMP_LIQUID0_BIT, &dep_throttler_status) ||
+ test_bit(THROTTLER_TEMP_LIQUID1_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TDC_GFX_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TDC_GFX_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_TDC_SOC_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_TDC_SOC_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_PPT0_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_PPT0_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_PPT1_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_PPT1_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_PPT2_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_PPT2_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_PPT3_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_PPT3_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_FIT_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_FIT_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_PPM_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_PPM_BIT, &dep_throttler_status));
+ __assign_bit(INDEP_THROTTLER_APCC_BIT, &indep_throttler_status,
+ test_bit(THROTTLER_APCC_BIT, &dep_throttler_status));
+
+ return (uint32_t)indep_throttler_status;
+}
+
static int sienna_cichlid_get_smu_metrics_data(struct smu_context *smu,
MetricsMember_t member,
uint32_t *value)
@@ -542,7 +585,7 @@ static int sienna_cichlid_get_smu_metrics_data(struct smu_context *smu,
SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
break;
case METRICS_THROTTLER_STATUS:
- *value = metrics->ThrottlerStatus;
+ *value = sienna_cichlid_get_indep_throttler_status(metrics->ThrottlerStatus);
break;
case METRICS_CURR_FANSPEED:
*value = metrics->CurrFanSpeed;
@@ -3666,7 +3709,8 @@ static ssize_t sienna_cichlid_get_gpu_metrics(struct smu_context *smu,
gpu_metrics->current_vclk1 = metrics->CurrClock[PPCLK_VCLK_1];
gpu_metrics->current_dclk1 = metrics->CurrClock[PPCLK_DCLK_1];
- gpu_metrics->throttle_status = metrics->ThrottlerStatus;
+ gpu_metrics->throttle_status =
+ sienna_cichlid_get_indep_throttler_status(metrics->ThrottlerStatus);
gpu_metrics->current_fan_speed = metrics->CurrFanSpeed;
--
2.17.1
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