[PATCH] drm/amd/pm: Correct reserved uint32_t number in beige_goby_PPTable

Chen, Guchun Guchun.Chen at amd.com
Fri May 21 03:03:20 UTC 2021


[AMD Public Use]

Reviewed-by: Guchun Chen <guchun.chen at amd.com>

I wonder shall we pay further attention to the alignment of the strucuture PPTable_beige_goby_t?

Regards,
Guchun

-----Original Message-----
From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of Chengming Gui
Sent: Friday, May 21, 2021 10:59 AM
To: amd-gfx at lists.freedesktop.org
Cc: Feng, Kenneth <Kenneth.Feng at amd.com>; Zhou1, Tao <Tao.Zhou1 at amd.com>; Zhang, Hawking <Hawking.Zhang at amd.com>; Gui, Jack <Jack.Gui at amd.com>; Chen, Jiansong (Simon) <Jiansong.Chen at amd.com>
Subject: [PATCH] drm/amd/pm: Correct reserved uint32_t number in beige_goby_PPTable

Correct reserved number according to the latest struct in drm-next

Signed-off-by: Chengming Gui <Jack.Gui at amd.com>
Change-Id: I5991a8ef53134c00348a96f776a539bad6da4fa1
---
 drivers/gpu/drm/amd/pm/inc/smu11_driver_if_sienna_cichlid.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/pm/inc/smu11_driver_if_sienna_cichlid.h b/drivers/gpu/drm/amd/pm/inc/smu11_driver_if_sienna_cichlid.h
index a1079256d318..61c87c39be80 100644
--- a/drivers/gpu/drm/amd/pm/inc/smu11_driver_if_sienna_cichlid.h
+++ b/drivers/gpu/drm/amd/pm/inc/smu11_driver_if_sienna_cichlid.h
@@ -1176,7 +1176,7 @@ typedef struct {
   uint16_t         LedGpio;            //GeneriA GPIO flag used to control the radeon LEDs
   uint16_t         GfxPowerStagesGpio; //Genlk_vsync GPIO flag used to control gfx power stages 
 
-  uint32_t         SkuReserved[55];
+  uint32_t         SkuReserved[63];
 
 
 
-- 
2.17.1

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