[PATCH] drm/amdgpu: Fix Gstreamer api vaapih264enc missing

Liu, Leo Leo.Liu at amd.com
Thu May 27 14:27:34 UTC 2021


[Public]

On 2021-05-26 6:49 a.m., Christian König wrote:
> Am 26.05.21 um 12:13 schrieb Li, Xin (Justin):
>> since vcn decoding ring is not required, so just disable it.
>>
>> Cc: Alex.Deucher <alexander.deucher at amd.com>
>> Cc: Christian.Konig <christian.koenig at amd.com>
>> Signed-off-by: Li.Xin.Justin <xin2.li at amd.com>
>> Signed-off-by: Frank.Min <Frank.Min at amd.com>
>> ---
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c |  6 +++---
>>   drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c   | 25 ++++++++++++++-----------
>>   2 files changed, 17 insertions(+), 14 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>> index 524e4fe5efe8..614e6b06e94e 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>> @@ -427,7 +427,9 @@ static int amdgpu_hw_ip_info(struct amdgpu_device
>> *adev,
>>               if (adev->uvd.harvest_config & (1 << i))
>>                   continue;
>>   -            if (adev->vcn.inst[i].ring_dec.sched.ready)
>> +            if (adev->vcn.inst[i].ring_dec.sched.ready ||
>> +                (adev->asic_type == CHIP_NAVI12 &&
>> +                amdgpu_sriov_vf(adev)))
>
> Leo needs to take a closer look, but that looks fishy to me.

The decode is explicitly disabled with sriov case with vcn2

+            ring->sched.ready = false;

and I don't understand either why to add the ring number here if already
have it disabled. If you are trying to workaround some issues, the
changes from here is very bad hack and you probably need to find the
real root cause.

Regards,

Leo


>
> Why should the ring be available if it is disabled? That doesn't make
> sense.
>
> Christian.
>
>>                   ++num_rings;
>>           }
>>           ib_start_alignment = 16;
>> @@ -770,8 +772,6 @@ int amdgpu_info_ioctl(struct drm_device *dev,
>> void *data, struct drm_file *filp)
>>               dev_info->ids_flags |= AMDGPU_IDS_FLAGS_FUSION;
>>           if (amdgpu_mcbp || amdgpu_sriov_vf(adev))
>>               dev_info->ids_flags |= AMDGPU_IDS_FLAGS_PREEMPTION;
>> -        if (amdgpu_is_tmz(adev))
>> -            dev_info->ids_flags |= AMDGPU_IDS_FLAGS_TMZ;
>>             vm_size = adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE;
>>           vm_size -= AMDGPU_VA_RESERVED_SIZE;
>> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
>> b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
>> index 8af567c546db..dc8a36766c4a 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
>> @@ -220,17 +220,20 @@ static int vcn_v2_0_hw_init(void *handle)
>>   {
>>       struct amdgpu_device *adev = (struct amdgpu_device *)handle;
>>       struct amdgpu_ring *ring = &adev->vcn.inst->ring_dec;
>> -    int i, r;
>> +    int i, r = -1;
>>         adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell,
>>                            ring->doorbell_index, 0);
>>   -    if (amdgpu_sriov_vf(adev))
>> +    if (amdgpu_sriov_vf(adev)) {
>>           vcn_v2_0_start_sriov(adev);
>> -
>> -    r = amdgpu_ring_test_helper(ring);
>> -    if (r)
>> -        goto done;
>> +        if (adev->asic_type == CHIP_NAVI12)
>> +            ring->sched.ready = false;
>> +    } else {
>> +        r = amdgpu_ring_test_helper(ring);
>> +        if (r)
>> +            goto done;
>> +    }
>>         //Disable vcn decode for sriov
>>       if (amdgpu_sriov_vf(adev))
>> @@ -245,8 +248,11 @@ static int vcn_v2_0_hw_init(void *handle)
>>     done:
>>       if (!r)
>> -        DRM_INFO("VCN decode and encode initialized
>> successfully(under %s).\n",
>> -            (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)?"DPG
>> Mode":"SPG Mode");
>> +        DRM_INFO("VCN %s encode initialized successfully(under %s).\n",
>> +            (adev->asic_type == CHIP_NAVI12 &&
>> +                amdgpu_sriov_vf(adev))?"":"decode and",
>> +            (adev->pg_flags &
>> +                AMD_PG_SUPPORT_VCN_DPG)?"DPG Mode":"SPG Mode");
>>         return r;
>>   }
>> @@ -1721,9 +1727,6 @@ int vcn_v2_0_dec_ring_test_ring(struct
>> amdgpu_ring *ring)
>>       unsigned i;
>>       int r;
>>   -    if (amdgpu_sriov_vf(adev))
>> -        return 0;
>> -
>>       WREG32(adev->vcn.inst[ring->me].external.scratch9, 0xCAFEDEAD);
>>       r = amdgpu_ring_alloc(ring, 4);
>>       if (r)
>


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