[PATCH v2 2/8] drm/amd/pm: Add ASIC independent throttle bits
Graham Sider
Graham.Sider at amd.com
Fri May 28 19:58:09 UTC 2021
Add new defines for thermal throttle status bits which are ASIC
independent. This bit field will be visible to userspace via
gpu_metrics alongside the previous ASIC dependent bit fields. Seperated
into four 16-bit "types": power throttlers, current throttlers,
temperature, other. Also added extra defines new to v2 applicable to
renoir, namely PROCHOT and EDC bits.
Defined macro smu_u64_throttler_bit which is used instead of
__assign_bit + test_bit from previous patch revision due to upgrading to
64-bit field.
Signed-off-by: Graham Sider <Graham.Sider at amd.com>
---
drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h | 42 +++++++++++++++++++++++++
1 file changed, 42 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
index 523f9d2982e9..86aa699f6c0c 100644
--- a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h
@@ -35,6 +35,48 @@
#define SMU_DPM_USER_PROFILE_RESTORE (1 << 0)
+// Power Throttlers
+#define SMU_THROTTLER_PPT0_BIT 0
+#define SMU_THROTTLER_PPT1_BIT 1
+#define SMU_THROTTLER_PPT2_BIT 2
+#define SMU_THROTTLER_PPT3_BIT 3
+#define SMU_THROTTLER_SPL_BIT 4
+#define SMU_THROTTLER_FPPT_BIT 5
+#define SMU_THROTTLER_SPPT_BIT 6
+#define SMU_THROTTLER_SPPT_APU_BIT 7
+
+// Current Throttlers
+#define SMU_THROTTLER_TDC_GFX_BIT 16
+#define SMU_THROTTLER_TDC_SOC_BIT 17
+#define SMU_THROTTLER_TDC_MEM_BIT 18
+#define SMU_THROTTLER_TDC_VDD_BIT 19
+#define SMU_THROTTLER_TDC_CVIP_BIT 20
+#define SMU_THROTTLER_EDC_CPU_BIT 21
+#define SMU_THROTTLER_EDC_GFX_BIT 22
+#define SMU_THROTTLER_APCC_BIT 23
+
+// Temperature
+#define SMU_THROTTLER_TEMP_GPU_BIT 32
+#define SMU_THROTTLER_TEMP_CORE_BIT 33
+#define SMU_THROTTLER_TEMP_MEM_BIT 34
+#define SMU_THROTTLER_TEMP_EDGE_BIT 35
+#define SMU_THROTTLER_TEMP_HOTSPOT_BIT 36
+#define SMU_THROTTLER_TEMP_VR_GFX_BIT 37
+#define SMU_THROTTLER_TEMP_VR_SOC_BIT 38
+#define SMU_THROTTLER_TEMP_VR_MEM_BIT 39
+#define SMU_THROTTLER_TEMP_LIQUID_BIT 40
+#define SMU_THROTTLER_VRHOT0_BIT 41
+#define SMU_THROTTLER_VRHOT1_BIT 42
+#define SMU_THROTTLER_PROCHOT_CPU_BIT 43
+#define SMU_THROTTLER_PROCHOT_GFX_BIT 44
+
+// Other
+#define SMU_THROTTLER_PPM_BIT 48
+#define SMU_THROTTLER_FIT_BIT 49
+
+#define smu_u64_throttler_bit(dep, INDEP_BIT, DEP_BIT) \
+ ((1ULL & (dep >> DEP_BIT)) << INDEP_BIT)
+
struct smu_hw_power_state {
unsigned int magic;
};
--
2.17.1
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