[PATCH] drm/amd/amdgpu: Avoid writing GMC registers under sriov in gmc9
Christian König
ckoenig.leichtzumerken at gmail.com
Tue Nov 2 11:10:54 UTC 2021
Am 02.11.21 um 11:25 schrieb YuBiao Wang:
> [Why]
> For Vega10, disabling gart of gfxhub and mmhub could mess up KIQ and PSP under sriov mode, and lead to DMAR on host side.
>
> [How]
> Do not call gmc_gart_disable under sriov but keep vram_unpin to avoid
> pin_count leak.
NAK, if you want to do this you should probably avoid the write in the
low level hardware callbacks and not here.
Christian.
>
> Signed-off-by: YuBiao Wang <YuBiao.Wang at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index cb82404df534..365059a20ae8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -1793,14 +1793,13 @@ static void gmc_v9_0_gart_disable(struct amdgpu_device *adev)
> {
> adev->gfxhub.funcs->gart_disable(adev);
> adev->mmhub.funcs->gart_disable(adev);
> - amdgpu_gart_table_vram_unpin(adev);
> }
>
> static int gmc_v9_0_hw_fini(void *handle)
> {
> struct amdgpu_device *adev = (struct amdgpu_device *)handle;
>
> - gmc_v9_0_gart_disable(adev);
> + amdgpu_gart_table_vram_unpin(adev);
>
> if (amdgpu_sriov_vf(adev)) {
> /* full access mode, so don't touch any GMC register */
> @@ -1808,6 +1807,7 @@ static int gmc_v9_0_hw_fini(void *handle)
> return 0;
> }
>
> + gmc_v9_0_gart_disable(adev);
> amdgpu_irq_put(adev, &adev->gmc.ecc_irq, 0);
> amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0);
>
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