[PATCH 2/4] drm/amdkfd: add kfd_device_info_init function

[Sider, Graham]

[AMD Official Use Only]

> -----Original Message-----
> From: Alex Deucher <alexdeucher at gmail.com>
> Sent: Friday, November 19, 2021 1:55 PM
> To: Sider, Graham <Graham.Sider at amd.com>
> Cc: amd-gfx list <amd-gfx at lists.freedesktop.org>; Kuehling, Felix
> <Felix.Kuehling at amd.com>
> Subject: Re: [PATCH 2/4] drm/amdkfd: add kfd_device_info_init function
> 
> On Fri, Nov 19, 2021 at 11:28 AM Graham Sider <Graham.Sider at amd.com>
> wrote:
> >
> > Initializes device_info structs given either asic_type (enum) if GFX
> > version is less than GFX9, or GC IP version if greater. Also takes in
> > vf and the target compiler gfx version.
> >
> > Inclusion/exclusion to certain conditions for certain GC IP versions
> > may be necessary on npi bringup on a case-by-case basis, but for the
> > most part should be minimal (e.g. adding one || asic_version ==
> IP_VERSION(X ,X, X) case).
> >
> > Signed-off-by: Graham Sider <Graham.Sider at amd.com>
> > ---
> >  drivers/gpu/drm/amd/amdkfd/kfd_device.c | 58
> > +++++++++++++++++++++++++
> >  1 file changed, 58 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
> > b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
> > index e11fc4e20c32..23e35a466cf0 100644
> > --- a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
> > +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
> > @@ -511,6 +511,64 @@ static void kfd_gtt_sa_fini(struct kfd_dev *kfd);
> >
> >  static int kfd_resume(struct kfd_dev *kfd);
> >
> > +static void kfd_device_info_init(struct kfd_device_info *device_info,
> > +                                uint32_t asic_version, bool is_soc15,
> > +bool vf,
> 
> I'm not crazy about reusing asic_version for both the GC version and the asic
> type.  Seems like it would be easier to just pass adev and access what you
> need directly.
> 
> Alex
> 

That's fair, I was on the fence about it as well. I think setting some vars via adev in device_info_init itself is a good middle ground in terms of verbosity (what I was attempting to limit to a degree here). Thanks for the recommendation.

Graham

> 
> > +                                uint32_t gfx_target_version) {
> > +       device_info->max_pasid_bits = 16;
> > +       device_info->max_no_of_hqd = 24;
> > +       device_info->num_of_watch_points = 4;
> > +       device_info->mqd_size_aligned = MQD_SIZE_ALIGNED;
> > +       device_info->gfx_target_version = gfx_target_version;
> > +
> > +       if (is_soc15) {
> > +               device_info->doorbell_size = 8;
> > +               device_info->ih_ring_entry_size = 8 * sizeof(uint32_t);
> > +               device_info->event_interrupt_class = &event_interrupt_class_v9;
> > +               device_info->supports_cwsr = true;
> > +
> > +               if ((asic_version >= IP_VERSION(9, 0, 1)  &&
> > +                    asic_version <= IP_VERSION(9, 3, 0)) ||
> > +                    asic_version == IP_VERSION(10, 3, 1) ||
> > +                    asic_version == IP_VERSION(10, 3, 3))
> > +                       device_info->num_sdma_queues_per_engine = 2;
> > +               else
> > +                       device_info->num_sdma_queues_per_engine = 8;
> > +
> > +               // Navi2x+, Navi1x+
> > +               if (asic_version >= IP_VERSION(10, 3, 0))
> > +                       device_info->no_atomic_fw_version = 145;
> > +               else if (asic_version >= IP_VERSION(10, 1, 1))
> > +                       device_info->no_atomic_fw_version = 92;
> > +
> > +               // Raven
> > +               if (asic_version == IP_VERSION(9, 1, 0) ||
> > +                   asic_version == IP_VERSION(9, 2, 2))
> > +                       device_info->needs_iommu_device = true;
> > +
> > +               // Navi1x+
> > +               if (asic_version >= IP_VERSION(10, 1, 1))
> > +                       device_info->needs_pci_atomics = true;
> > +       } else {
> > +               device_info->doorbell_size = 4;
> > +               device_info->ih_ring_entry_size = 4 * sizeof(uint32_t);
> > +               device_info->event_interrupt_class =
> &event_interrupt_class_cik;
> > +               device_info->num_sdma_queues_per_engine = 2;
> > +
> > +               if (asic_version != CHIP_KAVERI &&
> > +                   asic_version != CHIP_HAWAII &&
> > +                   asic_version != CHIP_TONGA)
> > +                       device_info->supports_cwsr = true;
> > +
> > +               if (asic_version == CHIP_KAVERI ||
> > +                   asic_version == CHIP_CARRIZO)
> > +                       device_info->needs_iommu_device = true;
> > +
> > +               if (asic_version != CHIP_HAWAII && !vf)
> > +                       device_info->needs_pci_atomics = true;
> > +       }
> > +}
> > +
> >  struct kfd_dev *kgd2kfd_probe(struct amdgpu_device *adev, bool vf)  {
> >         struct kfd_dev *kfd;
> > --
> > 2.25.1
> >