[PATCH] drm/amdgpu: query default sclk from smu for cyan_skillfish

[Yu, Lang]

[Public]



>-----Original Message-----
>From: Chen, Guchun <Guchun.Chen at amd.com>
>Sent: Monday, October 11, 2021 10:27 PM
>To: Lazar, Lijo <Lijo.Lazar at amd.com>; Yu, Lang <Lang.Yu at amd.com>; amd-
>gfx at lists.freedesktop.org
>Cc: Deucher, Alexander <Alexander.Deucher at amd.com>; Huang, Ray
><Ray.Huang at amd.com>
>Subject: RE: [PATCH] drm/amdgpu: query default sclk from smu for cyan_skillfish
>
>[Public]
>
>Global variable to carry the sclk value looks a bit over-killed. Is it possible that
>move all into cyan_skillfish_od_edit_dpm_table, like querying sclk first and
>setting it to cyan_skillfish_user_settings.sclk?

1, We need to query default sclk in smu init phase and use it in od_edit_dpm_table,
so global variable is needed.
2,  To maintain "set then commit" command rule of pp_od_clk_voltage,
global variable is also needed. 

Regards,
Lang

We need some global variables to store user settings and 
>
>Regards,
>Guchun
>
>-----Original Message-----
>From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of Lazar,
>Lijo
>Sent: Monday, October 11, 2021 4:54 PM
>To: Yu, Lang <Lang.Yu at amd.com>; amd-gfx at lists.freedesktop.org
>Cc: Deucher, Alexander <Alexander.Deucher at amd.com>; Huang, Ray
><Ray.Huang at amd.com>
>Subject: Re: [PATCH] drm/amdgpu: query default sclk from smu for cyan_skillfish
>
>
>
>On 10/11/2021 2:01 PM, Lang Yu wrote:
>> Query default sclk instead of hard code.
>>
>> Signed-off-by: Lang Yu <lang.yu at amd.com>
>> ---
>>   .../gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c  | 12 +++++++++---
>>   1 file changed, 9 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c
>> b/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c
>> index 3d4c65bc29dc..d98fd06a2574 100644
>> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c
>> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c
>> @@ -47,7 +47,6 @@
>>   /* unit: MHz */
>>   #define CYAN_SKILLFISH_SCLK_MIN			1000
>>   #define CYAN_SKILLFISH_SCLK_MAX			2000
>> -#define CYAN_SKILLFISH_SCLK_DEFAULT			1800
>>
>>   /* unit: mV */
>>   #define CYAN_SKILLFISH_VDDC_MIN			700
>> @@ -59,6 +58,8 @@ static struct gfx_user_settings {
>>   	uint32_t vddc;
>>   } cyan_skillfish_user_settings;
>>
>> +static uint32_t cyan_skillfish_sclk_default;
>> +
>>   #define FEATURE_MASK(feature) (1ULL << feature)
>>   #define SMC_DPM_FEATURE ( \
>>   	FEATURE_MASK(FEATURE_FCLK_DPM_BIT)	|	\
>> @@ -365,13 +366,18 @@ static bool cyan_skillfish_is_dpm_running(struct
>smu_context *smu)
>>   		return false;
>>
>>   	ret = smu_cmn_get_enabled_32_bits_mask(smu, feature_mask, 2);
>> -
>>   	if (ret)
>>   		return false;
>>
>>   	feature_enabled = (uint64_t)feature_mask[0] |
>>   				((uint64_t)feature_mask[1] << 32);
>>
>> +	/*
>> +	 * cyan_skillfish specific, query default sclk inseted of hard code.
>> +	 */
>> +	cyan_skillfish_get_smu_metrics_data(smu, METRICS_CURR_GFXCLK,
>> +		&cyan_skillfish_sclk_default);
>> +
>
>Maybe add if (!cyan_skillfish_sclk_default) so that it's read only once during driver
>load and not on every suspend/resume.
>
>Reviewed-by: Lijo Lazar <lijo.lazar at amd.com>
>
>Thanks,
>Lijo
>
>>   	return !!(feature_enabled & SMC_DPM_FEATURE);
>>   }
>>
>> @@ -468,7 +474,7 @@ static int cyan_skillfish_od_edit_dpm_table(struct
>smu_context *smu,
>>   			return -EINVAL;
>>   		}
>>
>> -		cyan_skillfish_user_settings.sclk =
>CYAN_SKILLFISH_SCLK_DEFAULT;
>> +		cyan_skillfish_user_settings.sclk = cyan_skillfish_sclk_default;
>>   		cyan_skillfish_user_settings.vddc =
>CYAN_SKILLFISH_VDDC_MAGIC;
>>
>>   		break;
>>