[PATCH] drm/amd/display: Fix surface optimization regression on Carrizo

StDenis, Tom Tom.StDenis at amd.com
Tue Oct 12 14:19:26 UTC 2021


[AMD Official Use Only]

Tested-by: Tom St Denis <tom.stdenis at amd.com>

Thanks.

________________________________________
From: Alex Deucher <alexdeucher at gmail.com>
Sent: Tuesday, October 12, 2021 10:15
To: Kazlauskas, Nicholas
Cc: amd-gfx list; Lakha, Bhawanpreet; Lipski, Mikita; StDenis, Tom
Subject: Re: [PATCH] drm/amd/display: Fix surface optimization regression on Carrizo

On Tue, Oct 12, 2021 at 10:11 AM Nicholas Kazlauskas
<nicholas.kazlauskas at amd.com> wrote:
>
> [Why]
> DCE legacy optimization path isn't well tested under new DC optimization
> flow which can result in underflow occuring when initializing X11 on
> Carrizo.
>
> [How]
> Retain the legacy optimization flow for DCE and keep the new one for DCN
> to satisfy optimizations being correctly applied for ASIC that can
> support it.
>
> Fixes: ab37c6527bb1 ("drm/amd/display: Optimize bandwidth on following fast update")
> Cc: Bhawanpreet Lakha <bhawanpreet.lakha at amd.com>
> Cc: Mikita Lipski <mikita.lipski at amd.com>
> Reported-by: Tom St Denis <tom.stdenis at amd.com>
> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas at amd.com>

Acked-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  drivers/gpu/drm/amd/display/dc/core/dc.c | 15 +++++++++++++--
>  1 file changed, 13 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
> index da942e9f5142..f9876e429f26 100644
> --- a/drivers/gpu/drm/amd/display/dc/core/dc.c
> +++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
> @@ -3118,8 +3118,13 @@ void dc_commit_updates_for_stream(struct dc *dc,
>                         if (new_pipe->plane_state && new_pipe->plane_state != old_pipe->plane_state)
>                                 new_pipe->plane_state->force_full_update = true;
>                 }
> -       } else if (update_type == UPDATE_TYPE_FAST) {
> -               /* Previous frame finished and HW is ready for optimization. */
> +       } else if (update_type == UPDATE_TYPE_FAST && dc_ctx->dce_version >= DCE_VERSION_MAX) {
> +               /*
> +                * Previous frame finished and HW is ready for optimization.
> +                *
> +                * Only relevant for DCN behavior where we can guarantee the optimization
> +                * is safe to apply - retain the legacy behavior for DCE.
> +                */
>                 dc_post_update_surfaces_to_stream(dc);
>         }
>
> @@ -3178,6 +3183,12 @@ void dc_commit_updates_for_stream(struct dc *dc,
>                 }
>         }
>
> +       /* Legacy optimization path for DCE. */
> +       if (update_type >= UPDATE_TYPE_FULL && dc_ctx->dce_version < DCE_VERSION_MAX) {
> +               dc_post_update_surfaces_to_stream(dc);
> +               TRACE_DCE_CLOCK_STATE(&context->bw_ctx.bw.dce);
> +       }
> +
>         return;
>
>  }
> --
> 2.25.1
>


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