[PATCH 3/5] drm/amd/pm: Rename freq_values --> freq_value
Luben Tuikov
luben.tuikov at amd.com
Fri Oct 15 00:50:44 UTC 2021
By usage: read freq_values[x] to freq_value[x].
Cc: Alex Deucher <Alexander.Deucher at amd.com>
Signed-off-by: Luben Tuikov <luben.tuikov at amd.com>
---
.../gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 16 ++++++++--------
.../amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 18 +++++++++---------
2 files changed, 17 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index f810549df493d5..646e9bbf8af42a 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -1268,7 +1268,7 @@ static int navi10_print_clk_levels(struct smu_context *smu,
uint16_t *curve_settings;
int i, size = 0, ret = 0;
uint32_t curr_value = 0, value = 0, count = 0;
- uint32_t freq_values[3] = {0};
+ uint32_t freq_value[3] = {0, 0, 0};
uint32_t mark_index = 0;
struct smu_table_context *table_context = &smu->smu_table;
uint32_t gen_speed, lane_width;
@@ -1310,21 +1310,21 @@ static int navi10_print_clk_levels(struct smu_context *smu,
curr_value == value ? "*" : "");
}
} else {
- ret = smu_v11_0_get_dpm_freq_by_index(smu, clk_type, 0, &freq_values[0]);
+ ret = smu_v11_0_get_dpm_freq_by_index(smu, clk_type, 0, &freq_value[0]);
if (ret)
return size;
- ret = smu_v11_0_get_dpm_freq_by_index(smu, clk_type, count - 1, &freq_values[2]);
+ ret = smu_v11_0_get_dpm_freq_by_index(smu, clk_type, count - 1, &freq_value[2]);
if (ret)
return size;
- freq_values[1] = curr_value;
- mark_index = curr_value == freq_values[0] ? 0 :
- curr_value == freq_values[2] ? 2 : 1;
+ freq_value[1] = curr_value;
+ mark_index = curr_value == freq_value[0] ? 0 :
+ curr_value == freq_value[2] ? 2 : 1;
if (mark_index != 1)
- freq_values[1] = (freq_values[0] + freq_values[2]) / 2;
+ freq_value[1] = (freq_value[0] + freq_value[2]) / 2;
for (i = 0; i < 3; i++) {
- size += sysfs_emit_at(buf, size, "%d: %uMhz %s\n", i, freq_values[i],
+ size += sysfs_emit_at(buf, size, "%d: %uMhz %s\n", i, freq_value[i],
i == mark_index ? "*" : "");
}
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
index 3ebded3a99b5f2..f630d5e928ccfe 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
@@ -1053,7 +1053,7 @@ static int sienna_cichlid_print_clk_levels(struct smu_context *smu,
(OverDriveTable_t *)table_context->overdrive_table;
int i, size = 0, ret = 0;
uint32_t curr_value = 0, value = 0, count = 0;
- uint32_t freq_values[3] = {0};
+ uint32_t freq_value[3] = {0, 0, 0};
uint32_t mark_index = 0;
uint32_t gen_speed, lane_width;
uint32_t min_value, max_value;
@@ -1096,26 +1096,26 @@ static int sienna_cichlid_print_clk_levels(struct smu_context *smu,
curr_value == value ? "*" : "");
}
} else {
- ret = smu_v11_0_get_dpm_freq_by_index(smu, clk_type, 0, &freq_values[0]);
+ ret = smu_v11_0_get_dpm_freq_by_index(smu, clk_type, 0, &freq_value[0]);
if (ret)
goto print_clk_out;
- ret = smu_v11_0_get_dpm_freq_by_index(smu, clk_type, count - 1, &freq_values[2]);
+ ret = smu_v11_0_get_dpm_freq_by_index(smu, clk_type, count - 1, &freq_value[2]);
if (ret)
goto print_clk_out;
- freq_values[1] = curr_value;
- mark_index = curr_value == freq_values[0] ? 0 :
- curr_value == freq_values[2] ? 2 : 1;
+ freq_value[1] = curr_value;
+ mark_index = curr_value == freq_value[0] ? 0 :
+ curr_value == freq_value[2] ? 2 : 1;
count = 3;
if (mark_index != 1) {
count = 2;
- freq_values[1] = freq_values[2];
+ freq_value[1] = freq_value[2];
}
for (i = 0; i < count; i++) {
- size += sysfs_emit_at(buf, size, "%d: %uMhz %s\n", i, freq_values[i],
- curr_value == freq_values[i] ? "*" : "");
+ size += sysfs_emit_at(buf, size, "%d: %uMhz %s\n", i, freq_value[i],
+ curr_value == freq_value[i] ? "*" : "");
}
}
--
2.33.1.558.g2bd2f258f4
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