[PATCH 17/27] drm/amd/display: Increase watermark latencies for DCN3.1
Paul Menzel
pmenzel at molgen.mpg.de
Mon Oct 18 22:56:10 UTC 2021
Dear Nikola, dear Augustin,
Am 15.10.21 um 20:43 schrieb Agustin Gutierrez:
> From: Nikola Cornij <nikola.cornij at amd.com>
>
> [why]
> The original latencies were causing underflow in some modes
Which modes exactly? On what hardware? How can it be reproduced?
> [how]
> Replace with the up-to-date watermark values based on new measurments
measurements
How can these measurements be done?
Kind regards,
Paul
> Reviewed-by: Ahmad Othman <ahmad.othman at amd.com>
> Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez at amd.com>
> Signed-off-by: Nikola Cornij <nikola.cornij at amd.com>
> ---
> .../amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c | 16 ++++++++--------
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c
> index 3fae1f1f028d..0088dff441da 100644
> --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c
> +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c
> @@ -371,32 +371,32 @@ static struct wm_table lpddr5_wm_table = {
> .wm_inst = WM_A,
> .wm_type = WM_TYPE_PSTATE_CHG,
> .pstate_latency_us = 11.65333,
> - .sr_exit_time_us = 5.32,
> - .sr_enter_plus_exit_time_us = 6.38,
> + .sr_exit_time_us = 11.5,
> + .sr_enter_plus_exit_time_us = 14.5,
> .valid = true,
> },
> {
> .wm_inst = WM_B,
> .wm_type = WM_TYPE_PSTATE_CHG,
> .pstate_latency_us = 11.65333,
> - .sr_exit_time_us = 9.82,
> - .sr_enter_plus_exit_time_us = 11.196,
> + .sr_exit_time_us = 11.5,
> + .sr_enter_plus_exit_time_us = 14.5,
> .valid = true,
> },
> {
> .wm_inst = WM_C,
> .wm_type = WM_TYPE_PSTATE_CHG,
> .pstate_latency_us = 11.65333,
> - .sr_exit_time_us = 9.89,
> - .sr_enter_plus_exit_time_us = 11.24,
> + .sr_exit_time_us = 11.5,
> + .sr_enter_plus_exit_time_us = 14.5,
> .valid = true,
> },
> {
> .wm_inst = WM_D,
> .wm_type = WM_TYPE_PSTATE_CHG,
> .pstate_latency_us = 11.65333,
> - .sr_exit_time_us = 9.748,
> - .sr_enter_plus_exit_time_us = 11.102,
> + .sr_exit_time_us = 11.5,
> + .sr_enter_plus_exit_time_us = 14.5,
> .valid = true,
> },
> }
>
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