[PATCH] drm/amd/amdgpu: move dpcs headers to dpcs directory

[Harry Wentland]

On 2021-10-20 09:54, Tom St Denis wrote:
> Move dpcs headers from asic_reg/dcn to asic_reg/dpcs.
> 
> Update various .c files to include new path.
> 
> Signed-off-by: Tom St Denis <tom.stdenis at amd.com>

Acked-by: Harry Wentland <harry.wentland at amd.com>

Harry

> ---
>  drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c  | 4 ++--
>  drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c         | 4 ++--
>  drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c       | 4 ++--
>  drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c       | 4 ++--
>  drivers/gpu/drm/amd/display/dc/dcn303/dcn303_resource.c       | 4 ++--
>  drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_factory_dcn30.c  | 4 ++--
>  .../gpu/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.c    | 4 ++--
>  drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c  | 4 ++--
>  .../amd/include/asic_reg/{dcn => dpcs}/dpcs_3_0_0_offset.h    | 0
>  .../amd/include/asic_reg/{dcn => dpcs}/dpcs_3_0_0_sh_mask.h   | 0
>  .../amd/include/asic_reg/{dcn => dpcs}/dpcs_3_0_3_offset.h    | 0
>  .../amd/include/asic_reg/{dcn => dpcs}/dpcs_3_0_3_sh_mask.h   | 0
>  12 files changed, 16 insertions(+), 16 deletions(-)
>  rename drivers/gpu/drm/amd/include/asic_reg/{dcn => dpcs}/dpcs_3_0_0_offset.h (100%)
>  rename drivers/gpu/drm/amd/include/asic_reg/{dcn => dpcs}/dpcs_3_0_0_sh_mask.h (100%)
>  rename drivers/gpu/drm/amd/include/asic_reg/{dcn => dpcs}/dpcs_3_0_3_offset.h (100%)
>  rename drivers/gpu/drm/amd/include/asic_reg/{dcn => dpcs}/dpcs_3_0_3_sh_mask.h (100%)
> 
> diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c
> index 1861a147a7fa..7d4be9d727a7 100644
> --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c
> +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c
> @@ -42,8 +42,8 @@
>  
>  #include "nbio/nbio_7_4_offset.h"
>  
> -#include "dcn/dpcs_3_0_0_offset.h"
> -#include "dcn/dpcs_3_0_0_sh_mask.h"
> +#include "dpcs/dpcs_3_0_0_offset.h"
> +#include "dpcs/dpcs_3_0_0_sh_mask.h"
>  
>  #include "mmhub/mmhub_2_0_0_offset.h"
>  #include "mmhub/mmhub_2_0_0_sh_mask.h"
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
> index 3a8a3214f770..aa5ea6656a8d 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
> @@ -72,8 +72,8 @@
>  
>  #include "nbio/nbio_7_4_offset.h"
>  
> -#include "dcn/dpcs_3_0_0_offset.h"
> -#include "dcn/dpcs_3_0_0_sh_mask.h"
> +#include "dpcs/dpcs_3_0_0_offset.h"
> +#include "dpcs/dpcs_3_0_0_sh_mask.h"
>  
>  #include "mmhub/mmhub_2_0_0_offset.h"
>  #include "mmhub/mmhub_2_0_0_sh_mask.h"
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
> index 5350c93d7772..8a312e0d9c1a 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
> @@ -73,8 +73,8 @@
>  
>  #include "nbio/nbio_7_2_0_offset.h"
>  
> -#include "dcn/dpcs_3_0_0_offset.h"
> -#include "dcn/dpcs_3_0_0_sh_mask.h"
> +#include "dpcs/dpcs_3_0_0_offset.h"
> +#include "dpcs/dpcs_3_0_0_sh_mask.h"
>  
>  #include "reg_helper.h"
>  #include "dce/dmub_abm.h"
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c b/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
> index fcf96cf08c76..38f43f9cab5c 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
> @@ -64,8 +64,8 @@
>  #include "dimgrey_cavefish_ip_offset.h"
>  #include "dcn/dcn_3_0_2_offset.h"
>  #include "dcn/dcn_3_0_2_sh_mask.h"
> -#include "dcn/dpcs_3_0_0_offset.h"
> -#include "dcn/dpcs_3_0_0_sh_mask.h"
> +#include "dpcs/dpcs_3_0_0_offset.h"
> +#include "dpcs/dpcs_3_0_0_sh_mask.h"
>  #include "nbio/nbio_7_4_offset.h"
>  #include "amdgpu_socbb.h"
>  
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn303/dcn303_resource.c b/drivers/gpu/drm/amd/display/dc/dcn303/dcn303_resource.c
> index 2ce6eae7535d..e29220b3c67f 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn303/dcn303_resource.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn303/dcn303_resource.c
> @@ -48,8 +48,8 @@
>  #include "sienna_cichlid_ip_offset.h"
>  #include "dcn/dcn_3_0_3_offset.h"
>  #include "dcn/dcn_3_0_3_sh_mask.h"
> -#include "dcn/dpcs_3_0_3_offset.h"
> -#include "dcn/dpcs_3_0_3_sh_mask.h"
> +#include "dpcs/dpcs_3_0_3_offset.h"
> +#include "dpcs/dpcs_3_0_3_sh_mask.h"
>  #include "nbio/nbio_2_3_offset.h"
>  
>  #define DC_LOGGER_INIT(logger)
> diff --git a/drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_factory_dcn30.c b/drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_factory_dcn30.c
> index 5f6ae3edb755..3b7df1ac26be 100644
> --- a/drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_factory_dcn30.c
> +++ b/drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_factory_dcn30.c
> @@ -42,8 +42,8 @@
>  
>  #include "nbio/nbio_7_4_offset.h"
>  
> -#include "dcn/dpcs_3_0_0_offset.h"
> -#include "dcn/dpcs_3_0_0_sh_mask.h"
> +#include "dpcs/dpcs_3_0_0_offset.h"
> +#include "dpcs/dpcs_3_0_0_sh_mask.h"
>  
>  #include "mmhub/mmhub_2_0_0_offset.h"
>  #include "mmhub/mmhub_2_0_0_sh_mask.h"
> diff --git a/drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.c b/drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.c
> index 0046219a1cc7..6b6b7c7bd12f 100644
> --- a/drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.c
> +++ b/drivers/gpu/drm/amd/display/dc/gpio/dcn30/hw_translate_dcn30.c
> @@ -40,8 +40,8 @@
>  
>  #include "nbio/nbio_7_4_offset.h"
>  
> -#include "dcn/dpcs_3_0_0_offset.h"
> -#include "dcn/dpcs_3_0_0_sh_mask.h"
> +#include "dpcs/dpcs_3_0_0_offset.h"
> +#include "dpcs/dpcs_3_0_0_sh_mask.h"
>  
>  #include "mmhub/mmhub_2_0_0_offset.h"
>  #include "mmhub/mmhub_2_0_0_sh_mask.h"
> diff --git a/drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c b/drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c
> index 914ce2ce1c2f..0b68c08fac3f 100644
> --- a/drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c
> +++ b/drivers/gpu/drm/amd/display/dc/irq/dcn30/irq_service_dcn30.c
> @@ -37,8 +37,8 @@
>  
>  #include "nbio/nbio_7_4_offset.h"
>  
> -#include "dcn/dpcs_3_0_0_offset.h"
> -#include "dcn/dpcs_3_0_0_sh_mask.h"
> +#include "dpcs/dpcs_3_0_0_offset.h"
> +#include "dpcs/dpcs_3_0_0_sh_mask.h"
>  
>  #include "mmhub/mmhub_2_0_0_offset.h"
>  #include "mmhub/mmhub_2_0_0_sh_mask.h"
> diff --git a/drivers/gpu/drm/amd/include/asic_reg/dcn/dpcs_3_0_0_offset.h b/drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_0_offset.h
> similarity index 100%
> rename from drivers/gpu/drm/amd/include/asic_reg/dcn/dpcs_3_0_0_offset.h
> rename to drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_0_offset.h
> diff --git a/drivers/gpu/drm/amd/include/asic_reg/dcn/dpcs_3_0_0_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_0_sh_mask.h
> similarity index 100%
> rename from drivers/gpu/drm/amd/include/asic_reg/dcn/dpcs_3_0_0_sh_mask.h
> rename to drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_0_sh_mask.h
> diff --git a/drivers/gpu/drm/amd/include/asic_reg/dcn/dpcs_3_0_3_offset.h b/drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_3_offset.h
> similarity index 100%
> rename from drivers/gpu/drm/amd/include/asic_reg/dcn/dpcs_3_0_3_offset.h
> rename to drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_3_offset.h
> diff --git a/drivers/gpu/drm/amd/include/asic_reg/dcn/dpcs_3_0_3_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_3_sh_mask.h
> similarity index 100%
> rename from drivers/gpu/drm/amd/include/asic_reg/dcn/dpcs_3_0_3_sh_mask.h
> rename to drivers/gpu/drm/amd/include/asic_reg/dpcs/dpcs_3_0_3_sh_mask.h
>