[PATCH] drm/amdgpu: limit VCN instance number to 1 for NAVY_FLOUNDER
Alex Deucher
alexdeucher at gmail.com
Thu Oct 21 13:05:43 UTC 2021
On Thu, Oct 21, 2021 at 3:15 AM Guchun Chen <guchun.chen at amd.com> wrote:
>
> VCN instance 1 is power gated permanently by SMU.
>
> Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1743
>
> Fixes: f6b6d7d6bc2d("drm/amdgpu/vcn: remove manual instance setting")
> Signed-off-by: Guchun Chen <guchun.chen at amd.com>
Doesn't this patch effectively do the same thing?
https://patchwork.freedesktop.org/patch/460329/
Where else is num_vcn_inst used that it causes a problem? Or is the
VCN harvesting not set correctly on some navy flounders?
Alex
> ---
> drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
> index dbfd92984655..4848922667f2 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
> @@ -103,6 +103,15 @@ static int vcn_v3_0_early_init(void *handle)
> adev->vcn.num_enc_rings = 0;
> else
> adev->vcn.num_enc_rings = 2;
> +
> + /*
> + * Fix ME.
> + * VCN instance number is limited to 1 for below ASIC due to
> + * VCN instnace 1 is permanently power gated.
> + */
> + if ((adev->ip_versions[UVD_HWIP][0] == IP_VERSION(3, 0, 0)) &&
> + (adev->ip_versions[GC_HWIP][0] == IP_VERSION(10, 3, 2)))
> + adev->vcn.num_vcn_inst = 1;
> }
>
> vcn_v3_0_set_dec_ring_funcs(adev);
> --
> 2.17.1
>
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