[PATCH] drm/amdgpu/UAPI: rearrange header to better align related items

Luben Tuikov luben.tuikov at amd.com
Tue Oct 26 20:47:52 UTC 2021


Reviewed-by: Luben Tuikov <luben.tuikov at amd.com>


On 2021-10-26 10:47, Alex Deucher wrote:
> Move the RAS query parameters to align with the INFO query where
> they are used.  No functional change.
>
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
> ---
>  include/uapi/drm/amdgpu_drm.h | 13 ++++++-------
>  1 file changed, 6 insertions(+), 7 deletions(-)
>
> diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
> index 0cbd1540aeac..26e45fc5eb1a 100644
> --- a/include/uapi/drm/amdgpu_drm.h
> +++ b/include/uapi/drm/amdgpu_drm.h
> @@ -786,13 +786,6 @@ struct drm_amdgpu_cs_chunk_data {
>  #define AMDGPU_INFO_VRAM_LOST_COUNTER		0x1F
>  /* query ras mask of enabled features*/
>  #define AMDGPU_INFO_RAS_ENABLED_FEATURES	0x20
> -/* query video encode/decode caps */
> -#define AMDGPU_INFO_VIDEO_CAPS			0x21
> -	/* Subquery id: Decode */
> -	#define AMDGPU_INFO_VIDEO_CAPS_DECODE		0
> -	/* Subquery id: Encode */
> -	#define AMDGPU_INFO_VIDEO_CAPS_ENCODE		1
> -
>  /* RAS MASK: UMC (VRAM) */
>  #define AMDGPU_INFO_RAS_ENABLED_UMC			(1 << 0)
>  /* RAS MASK: SDMA */
> @@ -821,6 +814,12 @@ struct drm_amdgpu_cs_chunk_data {
>  #define AMDGPU_INFO_RAS_ENABLED_MP1			(1 << 12)
>  /* RAS MASK: FUSE */
>  #define AMDGPU_INFO_RAS_ENABLED_FUSE			(1 << 13)
> +/* query video encode/decode caps */
> +#define AMDGPU_INFO_VIDEO_CAPS			0x21
> +	/* Subquery id: Decode */
> +	#define AMDGPU_INFO_VIDEO_CAPS_DECODE		0
> +	/* Subquery id: Encode */
> +	#define AMDGPU_INFO_VIDEO_CAPS_ENCODE		1
>  
>  #define AMDGPU_INFO_MMR_SE_INDEX_SHIFT	0
>  #define AMDGPU_INFO_MMR_SE_INDEX_MASK	0xff



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