[RFC PATCH v2 1/2] drm/amdgpu: Add IB test dedicated BOs

[xinhui pan]

Two dedicated VRAM and GTT BOs for IB test.

Signed-off-by: xinhui pan <xinhui.pan at amd.com>
---
change from v1
	check the existence of uvd and clean the code
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h        |  4 ++
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c |  6 +++
 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c     | 53 ++++++++++++++++++++++
 3 files changed, 63 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index e9e3ea0bdf37..93db6ee9b719 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -519,6 +519,8 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
 int amdgpu_ib_pool_init(struct amdgpu_device *adev);
 void amdgpu_ib_pool_fini(struct amdgpu_device *adev);
 int amdgpu_ib_ring_tests(struct amdgpu_device *adev);
+int amdgpu_ib_test_create_bo(struct amdgpu_device *adev);
+void amdgpu_ib_test_destroy_bo(struct amdgpu_device *adev);
 
 /*
  * CS.
@@ -949,6 +951,8 @@ struct amdgpu_device {
 	bool				ib_pool_ready;
 	struct amdgpu_sa_manager	ib_pools[AMDGPU_IB_POOL_MAX];
 	struct amdgpu_sched		gpu_sched[AMDGPU_HW_IP_NUM][AMDGPU_RING_PRIO_MAX];
+	struct amdgpu_bo		*ib_test_vram_bo;
+	struct amdgpu_bo		*ib_test_gtt_bo;
 
 	/* interrupts */
 	struct amdgpu_irq		irq;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 4e13381e9b5f..5f9b6ca671db 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2389,6 +2389,10 @@ static int amdgpu_device_ip_init(struct amdgpu_device *adev)
 		goto init_failed;
 	}
 
+	r = amdgpu_ib_test_create_bo(adev);
+	if (r)
+		goto init_failed;
+
 	r = amdgpu_ucode_create_bo(adev); /* create ucode bo when sw_init complete*/
 	if (r)
 		goto init_failed;
@@ -2768,6 +2772,8 @@ static int amdgpu_device_ip_fini(struct amdgpu_device *adev)
 
 	amdgpu_amdkfd_device_fini_sw(adev);
 
+	amdgpu_ib_test_destroy_bo(adev);
+
 	for (i = adev->num_ip_blocks - 1; i >= 0; i--) {
 		if (!adev->ip_blocks[i].status.sw)
 			continue;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
index c076a6b9a5a2..fc2316839e2a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
@@ -429,6 +429,59 @@ int amdgpu_ib_ring_tests(struct amdgpu_device *adev)
 	return ret;
 }
 
+void amdgpu_ib_test_destroy_bo(struct amdgpu_device *adev)
+{
+	amdgpu_bo_free_kernel(&adev->ib_test_gtt_bo, NULL, NULL);
+	amdgpu_bo_free_kernel(&adev->ib_test_vram_bo, NULL, NULL);
+}
+
+int amdgpu_ib_test_create_bo(struct amdgpu_device *adev)
+{
+	struct amdgpu_bo *bo = NULL;
+	void *addr;
+	int r;
+
+	amdgpu_ib_test_destroy_bo(adev);
+
+	r = amdgpu_bo_create_reserved(adev, 128 * 1024, PAGE_SIZE,
+			AMDGPU_GEM_DOMAIN_GTT,
+			&bo, NULL, &addr);
+	if (r)
+		return r;
+	adev->ib_test_gtt_bo = bo;
+	amdgpu_bo_unreserve(bo);
+
+	bo = NULL;
+	r = amdgpu_bo_create_reserved(adev, 128 * 1024, PAGE_SIZE,
+			AMDGPU_GEM_DOMAIN_VRAM,
+			&bo, NULL, &addr);
+	if (r)
+		goto err_create;
+	if (amdgpu_device_ip_get_ip_block(adev, AMD_IP_BLOCK_TYPE_UVD) &&
+			!adev->uvd.address_64_bit) {
+		amdgpu_bo_kunmap(bo);
+		amdgpu_bo_unpin(bo);
+		r = amdgpu_bo_pin_restricted(bo, AMDGPU_GEM_DOMAIN_VRAM,
+				0, 256 << 20);
+		if (r)
+			goto err_pin;
+		r = amdgpu_bo_kmap(bo, &addr);
+		if (r)
+			goto err_map;
+	}
+	adev->ib_test_vram_bo = bo;
+	amdgpu_bo_unreserve(bo);
+
+	return 0;
+err_map:
+	amdgpu_bo_unpin(bo);
+err_pin:
+	amdgpu_bo_unreserve(bo);
+	amdgpu_bo_unref(&bo);
+err_create:
+	amdgpu_bo_free_kernel(&adev->ib_test_gtt_bo, NULL, NULL);
+	return r;
+}
 /*
  * Debugfs info
  */
-- 
2.25.1