[PATCH 00/24] DC Patches Sep 24, 2021

Wheeler, Daniel Daniel.Wheeler at amd.com
Mon Sep 27 13:21:33 UTC 2021


[Public]

Hi all,
 
This week this patchset was tested on the following systems:
 
HP Envy 360, with Ryzen 5 4500U, with the following display types: eDP 1080p 60hz, 4k 60hz  (via USB-C to DP/HDMI), 1440p 144hz (via USB-C to DP/HDMI), 1680*1050 60hz (via USB-C to DP and then DP to DVI/VGA)
 
AMD Ryzen 9 5900H, with the following display types: eDP 1080p 60hz, 4k 60hz  (via USB-C to DP/HDMI), 1440p 144hz (via USB-C to DP/HDMI), 1680*1050 60hz (via USB-C to DP and then DP to DVI/VGA)
 
Sapphire Pulse RX5700XT with the following display types:
4k 60hz  (via DP/HDMI), 1440p 144hz (via DP/HDMI), 1680*1050 60hz (via DP to DVI/VGA)
 
Reference AMD RX6800 with the following display types:
4k 60hz  (via DP/HDMI and USB-C to DP/HDMI), 1440p 144hz (via USB-C to DP/HDMI and USB-C to DP/HDMI), 1680*1050 60hz (via DP to DVI/VGA)
 
Included testing using a Startech DP 1.4 MST hub at 2x 4k 60hz, and 3x 1080p 60hz on all systems.
 
 
Tested-by: Daniel Wheeler <daniel.wheeler at amd.com>
 
 
Thank you,
 
Dan Wheeler
Technologist  |  AMD
SW Display
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1 Commerce Valley Dr E, Thornhill, ON L3T 7X6
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-----Original Message-----
From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of Anson Jacob
Sent: September 24, 2021 3:09 PM
To: amd-gfx at lists.freedesktop.org
Cc: Wentland, Harry <Harry.Wentland at amd.com>; Li, Sun peng (Leo) <Sunpeng.Li at amd.com>; Lakha, Bhawanpreet <Bhawanpreet.Lakha at amd.com>; Siqueira, Rodrigo <Rodrigo.Siqueira at amd.com>; Pillai, Aurabindo <Aurabindo.Pillai at amd.com>; Zhuo, Qingqing <Qingqing.Zhuo at amd.com>; Lipski, Mikita <Mikita.Lipski at amd.com>; Li, Roman <Roman.Li at amd.com>; Jacob, Anson <Anson.Jacob at amd.com>; Lin, Wayne <Wayne.Lin at amd.com>; Wang, Chao-kai (Stylon) <Stylon.Wang at amd.com>; Chiu, Solomon <Solomon.Chiu at amd.com>
Subject: [PATCH 00/24] DC Patches Sep 24, 2021

This DC patchset brings improvements in multiple areas. In summary, we
have:
    - Fixes to backlight, LUT, PPS, MST
    - Use correct vpg for 128b/132b encoding
    - Improved logging for VCP
    - Replace referral of dal with dc

Anthony Koo (2):
  drm/amd/display: [FW Promotion] Release 0.0.85
  drm/amd/display: [FW Promotion] Release 0.0.86

Aric Cyr (1):
  drm/amd/display: 3.2.155

Charlene Liu (1):
  drm/amd/display: Pass PCI deviceid into DC

David Galiffi (1):
  drm/amd/display: Add debug support to override the Minimum DRAM Clock

Eric Yang (1):
  drm/amd/display: add vsync notify to dmub for abm pause

George Shen (2):
  drm/amd/display: Handle Y carry-over in VCP X.Y calculation
  drm/amd/display: Update VCP X.Y logging to improve usefulness

Ilya (1):
  drm/amd/display: Add PPS immediate update flag for DCN2

Jimmy Kizito (1):
  drm/amd/display: Fix MST link encoder availability check.

Josip Pavic (1):
  drm/amd/display: initialize backlight_ramping_override to false

Meenakshikumar Somasundaram (1):
  drm/amd/display: Fix for link encoder access for MST.

Michael Strauss (2):
  drm/amd/display: Don't enable AFMT for DP audio stream
  drm/amd/display: Defer LUT memory powerdown until LUT bypass latches

Oliver Logush (1):
  drm/amd/display: Add an extra check for dcn10 OPTC data format

Qingqing Zhuo (1):
  drm/amd/display: Replace referral of dal with dc

Wenjing Liu (8):
  drm/amd/display: use correct vpg instance for 128b/132b encoding
  drm/amd/display: update cur_lane_setting to an array one for each lane
  drm/amd/display: add function to convert hw to dpcd lane settings
  drm/amd/display: implement decide lane settings
  drm/amd/display: rename lane_settings to hw_lane_settings
  drm/amd/display: decouple hw_lane_settings from dpcd_lane_settings
  drm/amd/display: add two lane settings training options
  drm/amd/display: make verified link cap not exceeding max link cap

 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |   2 +
 .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c |  14 +-
 .../display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c  |   2 +-
 .../amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c |   2 +-
 drivers/gpu/drm/amd/display/dc/core/dc.c      |  73 +++
 drivers/gpu/drm/amd/display/dc/core/dc_link.c |  73 ++-  .../gpu/drm/amd/display/dc/core/dc_link_dp.c  | 591 +++++++-----------  .../drm/amd/display/dc/core/dc_link_enc_cfg.c |  23 +-
 .../drm/amd/display/dc/core/dc_link_hwss.c    |   5 +-
 drivers/gpu/drm/amd/display/dc/dc.h           |   5 +-
 drivers/gpu/drm/amd/display/dc/dc_dp_types.h  |   5 -
 drivers/gpu/drm/amd/display/dc/dc_link.h      |   2 +-
 .../drm/amd/display/dc/dce/dce_link_encoder.c |   6 +-
 drivers/gpu/drm/amd/display/dc/dce/dmub_abm.c |  21 +
 .../gpu/drm/amd/display/dc/dcn10/dcn10_ipp.h  |   6 -
 .../amd/display/dc/dcn10/dcn10_link_encoder.c |   6 +-
 .../gpu/drm/amd/display/dc/dcn10/dcn10_optc.c |   2 +-
 .../display/dc/dcn10/dcn10_stream_encoder.c   |  11 +-
 .../gpu/drm/amd/display/dc/dcn20/dcn20_optc.c |   5 +
 .../drm/amd/display/dc/dcn20/dcn20_resource.c |   4 +
 .../display/dc/dcn20/dcn20_stream_encoder.c   |   9 +-
 .../dc/dcn30/dcn30_dio_stream_encoder.c       |   2 -
 .../gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c  |  59 +-
 .../drm/amd/display/dc/dcn31/dcn31_resource.c |   2 +-
 .../gpu/drm/amd/display/dc/inc/dc_link_dp.h   |  21 +-
 drivers/gpu/drm/amd/display/dc/inc/hw/abm.h   |   1 +
 drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h   |  12 +
 drivers/gpu/drm/amd/display/dc/inc/hw/dwb.h   |   1 -
 .../display/dc/irq/dcn20/irq_service_dcn20.c  |   2 +-
 .../display/dc/irq/dcn20/irq_service_dcn20.h  |   2 +-
 .../display/dc/irq/dcn21/irq_service_dcn21.c  |   2 +-
 .../display/dc/irq/dcn21/irq_service_dcn21.h  |   2 +-
 .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h   |  58 +-
 .../amd/display/include/link_service_types.h  |  29 +-
 34 files changed, 583 insertions(+), 477 deletions(-)

--
2.25.1


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