[PATCH 1/1] drm/amdgpu: Flush TLB after mapping for VG20+XGMI

[Alex Deucher]

On Mon, Apr 4, 2022 at 3:03 PM Tomasz Moń <desowin at gmail.com> wrote:
>
> On 4/1/22 21:57, Philip Yang wrote:
> > For VG20 + XGMI bridge, all mappings PTEs cache in TC, this may have
> > stall invalid PTEs in TC because one cache line has 8 pages. Need always
> > flush_tlb after updating mapping.
> >
> > Signed-off-by: Philip Yang <Philip.Yang at amd.com>
> > ---
> >   drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 6 ++++++
> >   1 file changed, 6 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> > index f0aec04111a3..687c9a140645 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
> > @@ -837,6 +837,12 @@ int amdgpu_vm_update_range(struct amdgpu_device *adev, struct amdgpu_vm *vm,
> >               goto error_unlock;
> >       }
> >
> > +     /* Vega20+XGMI where PTEs get inadvertently cached in L2 texture cache,
> > +      * heavy-weight flush TLB unconditionally.
> > +      */
> > +     flush_tlb |= (adev->gmc.xgmi.num_physical_nodes &&
> > +                   adev->ip_versions[GC_HWIP][0] == IP_VERSION(9, 4, 0));
> > +
> >       memset(&params, 0, sizeof(params));
> >       params.adev = adev;
> >       params.vm = vm;
>
> On top of what commit does this work?
>
> It does not apply at top of v5.18-rc1.

This is stuff for drm-next
(https://gitlab.freedesktop.org/agd5f/linux/-/commits/drm-next).
E.g., 5.19.

Alex

>
> It does apply, but fails to compile, on top of "drm/amdkfd: Create file
> descriptor after client is added to smi_clients list" that is commit:
>    * cbe879c87245ce6272afe6456dbc8ce2c8f38d64 in amd-staging-drm-next
>    * e45422695c196dbc665a95526c85ff4b8752aff2 in drm-next
> fetched from https://gitlab.freedesktop.org/agd5f/linux.git
>
> The compile error is due to flush_tlb being undeclared.
>
> Best Regards,
> Tomasz Mon